linux-kernel - Re: [PATCH -next V8 10/14] riscv: Typo fixup for addi -> andi in comment

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Mon, 05 Dec 2022 10:18:25 +0100
From:   Björn Töpel <bjorn@...nel.org>
To:     guoren@...nel.org, arnd@...db.de, guoren@...nel.org,
        palmer@...osinc.com, tglx@...utronix.de, peterz@...radead.org,
        luto@...nel.org, conor.dooley@...rochip.com, heiko@...ech.de,
        jszhang@...nel.org, lazyparser@...il.com, falcon@...ylab.org,
        chenhuacai@...nel.org, apatel@...tanamicro.com,
        atishp@...shpatra.org, palmer@...belt.com,
        paul.walmsley@...ive.com, mark.rutland@....com,
        zouyipeng@...wei.com, bigeasy@...utronix.de,
        David.Laight@...lab.com, chenzhongjin@...wei.com,
        greentime.hu@...ive.com, andy.chiu@...ive.com
Cc:     linux-arch@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-riscv@...ts.infradead.org, Guo Ren <guoren@...ux.alibaba.com>
Subject: Re: [PATCH -next V8 10/14] riscv: Typo fixup for addi -> andi in
 comment

guoren@...nel.org writes:

> From: Guo Ren <guoren@...ux.alibaba.com>
>
> Correct typo for addi -> andi in comment, although the immediate[11:0]
> are the same.
>
> Signed-off-by: Guo Ren <guoren@...ux.alibaba.com>
> Signed-off-by: Guo Ren <guoren@...nel.org>
> ---
>  arch/riscv/kernel/entry.S | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S
> index 9864e784d6a6..03655577e26f 100644
> --- a/arch/riscv/kernel/entry.S
> +++ b/arch/riscv/kernel/entry.S
> @@ -138,7 +138,7 @@ ENTRY(ret_from_exception)
>  	REG_L s0, PT_STATUS(sp)
>  
>  #ifdef CONFIG_RISCV_M_MODE
> -	/* the MPP value is too large to be used as an immediate arg for addi */
> +	/* the MPP value is too large to be used as an immediate arg for andi */
>  	li t0, SR_MPP
>  	and s0, s0, t0
>  #else
> -- 
> 2.36.1

This doesn't belong in the series. Please do this as a separate fix,
which a Fixes tag.