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Message-ID: <97418c57-ba31-aa16-ed8f-208dad4ac0d2@starfivetech.com>
Date: Tue, 6 Dec 2022 15:39:45 +0800
From: yanhong wang <yanhong.wang@...rfivetech.com>
To: Andrew Lunn <andrew@...n.ch>
CC: <linux-riscv@...ts.infradead.org>, <netdev@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
"David S . Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
"Jakub Kicinski" <kuba@...nel.org>,
Paolo Abeni <pabeni@...hat.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Emil Renner Berthing <kernel@...il.dk>,
Richard Cochran <richardcochran@...il.com>,
Heiner Kallweit <hkallweit1@...il.com>,
Peter Geis <pgwipeout@...il.com>
Subject: Re: [PATCH v1 4/7] net: phy: motorcomm: Add YT8531 phy support
On 2022/12/1 23:40, Andrew Lunn wrote:
>> +static const struct ytphy_reg_field ytphy_rxtxd_grp[] = {
>> + { "rx_delay_sel", GENMASK(13, 10), 0x0 },
>> + { "tx_delay_sel_fe", GENMASK(7, 4), 0xf },
>> + { "tx_delay_sel", GENMASK(3, 0), 0x1 }
>> +};
>> +
>> +static const struct ytphy_reg_field ytphy_txinver_grp[] = {
>> + { "tx_inverted_1000", BIT(14), 0x0 },
>> + { "tx_inverted_100", BIT(14), 0x0 },
>> + { "tx_inverted_10", BIT(14), 0x0 }
>> +};
>> +
>> +static const struct ytphy_reg_field ytphy_rxden_grp[] = {
>> + { "rxc_dly_en", BIT(8), 0x1 }
>> +};
>> +
>> +static int ytphy_config_init(struct phy_device *phydev)
>> +{
>> + struct device_node *of_node;
>> + u32 val;
>> + u32 mask;
>> + u32 cfg;
>> + int ret;
>> + int i = 0;
>> +
>> + of_node = phydev->mdio.dev.of_node;
>> + if (of_node) {
>> + ret = of_property_read_u32(of_node, ytphy_rxden_grp[0].name, &cfg);
>
> You need to document the device tree binding.
>
> Frank Sae always gets the locking wrong in this driver. Have you
> tested your patch with lockdep enabled?
>
I will add document to describe details in the next version, such as "rx_delay_sel","tx_inverted_10" etc.
> Andrew
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