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Message-ID: <Y47z/DSw49Klk0px@hovoldconsulting.com>
Date: Tue, 6 Dec 2022 08:49:16 +0100
From: Johan Hovold <johan@...nel.org>
To: Rob Herring <robh@...nel.org>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
Johan Hovold <johan+linaro@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Alim Akhtar <alim.akhtar@...sung.com>,
Avri Altman <avri.altman@....com>,
Andy Gross <agross@...nel.org>,
Konrad Dybcio <konrad.dybcio@...aro.org>,
Bart Van Assche <bvanassche@....org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
linux-arm-msm@...r.kernel.org, linux-scsi@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/2] dt-bindings: ufs: qcom: allow 'dma-coherent' property
On Mon, Dec 05, 2022 at 04:35:22PM -0600, Rob Herring wrote:
> On Mon, Dec 05, 2022 at 02:12:48PM +0100, Johan Hovold wrote:
> > On Mon, Dec 05, 2022 at 06:30:48PM +0530, Manivannan Sadhasivam wrote:
> > > On Mon, Dec 05, 2022 at 01:27:34PM +0100, Johan Hovold wrote:
> > > > On Mon, Dec 05, 2022 at 05:50:18PM +0530, Manivannan Sadhasivam wrote:
> > > > > On Mon, Dec 05, 2022 at 01:07:16PM +0100, Johan Hovold wrote:
> > > > > > On Mon, Dec 05, 2022 at 05:29:06PM +0530, Manivannan Sadhasivam wrote:
> > > > > > > On Mon, Dec 05, 2022 at 11:08:36AM +0100, Johan Hovold wrote:
> > > > > > > > UFS controllers may be cache coherent and must be marked as such in the
> > > > > > > > devicetree to avoid data corruption.
>
> Typically, you'd only be doing unnecessary cache flushes without it
> rather than getting data corruption. However, it is possible this
> property triggers other system setup or something that would cause
> problems if not setup right.
You can end up with data corruption, for example, if the kernel remaps
a consistent buffer and writes data through the non-cacheable alias
while the coherent device snoops stale data from the caches.
Johan
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