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Message-ID: <Y48f4ktAwsPBW60y@lpieralisi>
Date:   Tue, 6 Dec 2022 11:56:34 +0100
From:   Lorenzo Pieralisi <lpieralisi@...nel.org>
To:     Johan Hovold <johan+linaro@...nel.org>
Cc:     Andy Gross <agross@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konrad.dybcio@...aro.org>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        Rob Herring <robh@...nel.org>,
        Krzysztof WilczyƄski <kw@...ux.com>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        linux-arm-msm@...r.kernel.org, linux-pci@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] dt-bindings: PCI: qcom: Allow 'dma-coherent' property

On Mon, Dec 05, 2022 at 10:45:30AM +0100, Johan Hovold wrote:
> Devices on some PCIe buses may be cache coherent and must be marked as
> such in the devicetree to avoid data corruption.
> 
> This is specifically needed on recent Qualcomm platforms like SC8280XP.
> 
> Signed-off-by: Johan Hovold <johan+linaro@...nel.org>
> ---
> 
> Lorenzo, the corresponding SC8280XP DT fix is heading for 6.2 so it
> would be nice if this one could be merged for 6.2-rc1 (or -rc2) as well
> to avoid the corresponding DT validation warnings.

What's the commit base for this patch ? I tried applying to my pci/dt
branch to no avail, please let me know and I will merge it.

Lorenzo

> 
> Johan
> 
> 
>  Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> index 2f851c804bb0..a5859bb3dc28 100644
> --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> @@ -62,6 +62,8 @@ properties:
>      minItems: 3
>      maxItems: 13
>  
> +  dma-coherent: true
> +
>    interconnects:
>      maxItems: 2
>  
> -- 
> 2.37.4
> 

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