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Message-ID: <b55ee8fa-7ad6-3bf9-4983-41a90bd75ce4@collabora.com>
Date:   Tue, 6 Dec 2022 13:22:04 +0100
From:   AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>
To:     Xiangsheng Hou (侯祥胜) 
        <Xiangsheng.Hou@...iatek.com>,
        "miquel.raynal@...tlin.com" <miquel.raynal@...tlin.com>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "broonie@...nel.org" <broonie@...nel.org>,
        "krzysztof.kozlowski+dt@...aro.org" 
        <krzysztof.kozlowski+dt@...aro.org>,
        "matthias.bgg@...il.com" <matthias.bgg@...il.com>,
        "gch981213@...il.com" <gch981213@...il.com>,
        "vigneshr@...com" <vigneshr@...com>,
        "richard@....at" <richard@....at>
Cc:     "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-mediatek@...ts.infradead.org" 
        <linux-mediatek@...ts.infradead.org>,
        "linux-mtd@...ts.infradead.org" <linux-mtd@...ts.infradead.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        Benliang Zhao (赵本亮) 
        <Benliang.Zhao@...iatek.com>,
        "linux-spi@...r.kernel.org" <linux-spi@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        Bin Zhang (章斌) <bin.zhang@...iatek.com>
Subject: Re: [PATCH v2 4/9] mtd: nand: ecc-mtk: Add ECC support fot MT7986 IC

Il 06/12/22 10:04, Xiangsheng Hou (侯祥胜) ha scritto:
> Hi Angelo,
> 
> On Mon, 2022-12-05 at 15:21 +0100, AngeloGioacchino Del Regno wrote:
>> Il 05/12/22 07:57, Xiangsheng Hou ha scritto:
>>> Add ECC support fot MT7986 IC.
>>>
>>> Signed-off-by: Xiangsheng Hou <xiangsheng.hou@...iatek.com>
>>> ---
>>>    drivers/mtd/nand/ecc-mtk.c | 18 ++++++++++++++++++
>>>    1 file changed, 18 insertions(+)
>>>
>>> diff --git a/drivers/mtd/nand/ecc-mtk.c b/drivers/mtd/nand/ecc-
>>> mtk.c
>>> index 9f9b201fe706..c2f6cfa76a04 100644
>>> --- a/drivers/mtd/nand/ecc-mtk.c
>>> +++ b/drivers/mtd/nand/ecc-mtk.c
>>> @@ -79,6 +79,10 @@ static const u8 ecc_strength_mt7622[] = {
>>>    	4, 6, 8, 10, 12
>>>    };
>>>    
>>> +static const u8 ecc_strength_mt7986[] = {
>>> +	4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24
>>> +};
>>> +
>>>    enum mtk_ecc_regs {
>>>    	ECC_ENCPAR00,
>>>    	ECC_ENCIRQ_EN,
>>> @@ -483,6 +487,17 @@ static const struct mtk_ecc_caps
>>> mtk_ecc_caps_mt7622 = {
>>>    	.pg_irq_sel = 0,
>>>    };
>>>    
>>> +static const struct mtk_ecc_caps mtk_ecc_caps_mt7986 = {
>>> +	.err_mask = 0x1f,
>>
>> Can't we use GENMASK() to define err_mask instead?
>>
>> #define MT7986_ERRNUM	GENMASK(4, 0)
>>
>> P.S.: Did I get that right? Is that referred to the ERRNUM(x) bits
> 
> Yes, you are right.
> I will change like
> #define ECC_ERRMASK(x) GENMASK(x, 0),
> since other IC driver data will use 0x3f and 0x7f err_mask.
> 

I would prefer, instead, something like

#define MT7986_ERRNUM	GENMASK(....)
#define MT7622_ERRNUM	GENMASK(....)
#define MT.... (etc)

instead of a macro calling another macro.

Regards,
Angelo


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