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Message-ID: <167033201265.232161.10135246798960157053.robh@kernel.org>
Date: Tue, 6 Dec 2022 07:06:53 -0600
From: Rob Herring <robh@...nel.org>
To: Conor Dooley <conor@...nel.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Paul Walmsley <paul.walmsley@...ive.com>,
Guo Ren <guoren@...nel.org>, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, Heiko Stuebner <heiko@...ech.de>,
Conor Dooley <conor.dooley@...rochip.com>,
Albert Ou <aou@...s.berkeley.edu>,
Andrew Jones <ajones@...tanamicro.com>,
linux-riscv@...ts.infradead.org, Rob Herring <robh+dt@...nel.org>,
Palmer Dabbelt <palmer@...belt.com>,
Jessica Clarke <jrtc27@...c27.com>
Subject: Re: [PATCH v3 1/2] dt-bindings: riscv: fix underscore requirement
for multi-letter extensions
On Mon, 05 Dec 2022 17:44:59 +0000, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@...rochip.com>
>
> The RISC-V ISA Manual allows the first multi-letter extension to avoid
> a leading underscore. Underscores are only required between multi-letter
> extensions.
>
> The dt-binding does not validate that a multi-letter extension is
> canonically ordered, as that'd need an even worse regex than is here,
> but it should not fail validation for valid ISA strings.
>
> Allow the first multi-letter extension to appear immediately after
> the single-letter extensions.
>
> Link: https://github.com/riscv/riscv-isa-manual/releases/tag/riscv-unpriv-pdf-from-asciidoc-15112022 # Chapter 29.5
> Fixes: 299824e68bd0 ("dt-bindings: riscv: add new riscv,isa strings for emulators")
> Acked-by: Guo Ren <guoren@...nel.org>
> Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
> ---
> Documentation/devicetree/bindings/riscv/cpus.yaml | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Acked-by: Rob Herring <robh@...nel.org>
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