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Date:   Wed, 7 Dec 2022 17:44:58 +0100
From:   Jonathan Neuschäfer <j.neuschaefer@....net>
To:     "Russell King (Oracle)" <linux@...linux.org.uk>
Cc:     Andrew Lunn <andrew@...n.ch>,
        Jonathan Neuschäfer <j.neuschaefer@....net>,
        linux-arm-kernel@...ts.infradead.org,
        Robert Jarzmik <robert.jarzmik@...e.fr>,
        Haojian Zhuang <haojian.zhuang@...il.com>,
        Daniel Mack <daniel@...que.org>, linux-kernel@...r.kernel.org
Subject: Re: PXA25x: GPIO driver fails probe due to resource conflict with
 pinctrl driver

On Wed, Dec 07, 2022 at 03:41:11PM +0000, Russell King (Oracle) wrote:
> On Wed, Dec 07, 2022 at 04:28:07PM +0100, Andrew Lunn wrote:
[...]
> > How are the registers arranged?
> 
> As documented in drivers/gpio/gpio-pxa.c - it'll be easier for you to
> look there rather than for me to explain it - but suffice it to say
> that the pinctrl registers are amongst the GPIO registers.
> 
> > Is 0x40e00000-0x40e0ffff simply too
> > large, and making it smaller would fix the issue? Or are the registers
> > interleaved?
> 
> They're interleaved. Looking at the .dtsi file for PXA25x, it seems
> that the pinctrl claims just the addresses that it needs, but the GPIO
> controller has no reg property in the .dtsi, so I'm not sure what fills
> that information in.

The GPIO reg property is in pxa2xx.dtsi.

> 
> DT could describe the region for PXA25x, which is just:
> 
> 	0x40e00000 - 0x40e00054
> 
> Later PXA have more banks, so would require additional resources to be
> listed.
> 
> However, first, we need to know what provides the iomem resource for
> this:
> 
>                 gpio: gpio@...00000 {
>                         compatible = "intel,pxa25x-gpio";
>                         gpio-ranges = <&pinctrl 0 0 84>;
>                         clocks = <&clks CLK_NONE>;
>                 };
> 
> -- 
> RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
> FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!


Jonathan

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