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Message-ID: <Y5EH6nKyMxe90eLo@smile.fi.intel.com>
Date: Wed, 7 Dec 2022 23:38:50 +0200
From: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To: "larry.lai" <larry.lai@...jingtech.com>
Cc: lee@...nel.org, linus.walleij@...aro.org, pavel@....cz,
linux-kernel@...r.kernel.org, linux-gpio@...r.kernel.org,
linux-leds@...r.kernel.org, GaryWang@...on.com.tw,
musa.lin@...jingtech.com, jack.chang@...jingtech.com,
noah.hung@...jingtech.com
Subject: Re: [RFC 0/3] Add support control UP board CPLD/FPGA pin control
On Wed, Dec 07, 2022 at 11:36:37PM +0200, Andy Shevchenko wrote:
> On Thu, Dec 08, 2022 at 12:33:56AM +0800, larry.lai wrote:
> > The UP board <http://www.upboard.com> is the computer board for
> > Professional Makers and Industrial Applications. We want to upstream
> > the UP board 40-pin GP-bus Kernel driver for giving the users better
> > experience on the software release. (not just download from UP board
> > github)
> >
> > These patches are generated from the Linux kernel mainline tag v6.0.
>
> I have just checked the v3 (previous version of this) and I haven't found any
> evidence that I gave my tag or permission to use it. What the heck is going on
> here?!
NAK to this series.
--
With Best Regards,
Andy Shevchenko
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