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Message-ID: <CAOMZO5D0wJcfbFsvUN3K17S5F4zT2Yf8yQB+wMKQPzuMBitrpA@mail.gmail.com>
Date: Wed, 7 Dec 2022 20:04:18 -0300
From: Fabio Estevam <festevam@...il.com>
To: Chester Lin <clin@...e.com>
Cc: Dong Aisheng <aisheng.dong@....com>,
Shawn Guo <shawnguo@...nel.org>, Jacky Bai <ping.bai@....com>,
Pengutronix Kernel Team <kernel@...gutronix.de>, s32@....com,
linux-gpio@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
Linus Walleij <linus.walleij@...aro.org>,
Larisa Grigore <larisa.grigore@....com>,
Ghennadi Procopciuc <Ghennadi.Procopciuc@....com>,
Andrei Stefanescu <andrei.stefanescu@....com>,
Radu Pirea <radu-nicolae.pirea@....com>,
Andreas Färber <afaerber@...e.de>,
Matthias Brugger <mbrugger@...e.com>,
Matthew Nunez <matthew.nunez@....com>,
Phu Luu An <phu.luuan@....com>,
Stefan-Gabriel Mirea <stefan-gabriel.mirea@....com>
Subject: Re: [PATCH v2 2/2] pinctrl: add NXP S32 SoC family support
Hi Chester,
On Mon, Nov 28, 2022 at 2:49 AM Chester Lin <clin@...e.com> wrote:
> +static struct platform_driver s32g_pinctrl_driver = {
> + .driver = {
> + .name = "s32g-siul2-pinctrl",
> + .owner = THIS_MODULE,
> + .of_match_table = s32_pinctrl_of_match,
> + .pm = &s32g_pinctrl_pm_ops,
> + },
> + .probe = s32g_pinctrl_probe,
> + .remove = s32_pinctrl_remove,
Do you really want to allow this pinctrl driver to be removed?
In other imx8m pinctrl drivers we pass:
.suppress_bind_attrs = true,
Check drivers/pinctrl/freescale/pinctrl-imx8mm.c for example.
> +module_platform_driver(s32g_pinctrl_driver);
And we also register it in arch_initcall() level.
Maybe you want to align these points with imx8m?
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