linux-kernel - [PATCH v1] irqchip: loongson-liointc: add hierarchy irq support

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [thread-next>] [day] [month] [year] [list]

Message-Id: <20221207014555.22465-1-zhuyinbo@loongson.cn>
Date:   Wed,  7 Dec 2022 09:45:55 +0800
From:   Yinbo Zhu <zhuyinbo@...ngson.cn>
To:     Huacai Chen <chenhuacai@...nel.org>,
        Jiaxun Yang <jiaxun.yang@...goat.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Marc Zyngier <maz@...nel.org>, linux-mips@...r.kernel.org,
        linux-kernel@...r.kernel.org
Cc:     Yinbo Zhu <zhuyinbo@...ngson.cn>
Subject: [PATCH v1] irqchip: loongson-liointc: add hierarchy irq support

When the irq of hierarchical interrupt chip was routed to liointc
that asked liointc driver to support hierarchy irq and this patch
was to add such support.

In addition, this patch only consider dts, and acpi hierarchy irq
support will be added later as required.

Signed-off-by: Yinbo Zhu <zhuyinbo@...ngson.cn>
---
 drivers/irqchip/irq-loongson-liointc.c | 31 ++++++++++++++++++++++++++
 1 file changed, 31 insertions(+)

diff --git a/drivers/irqchip/irq-loongson-liointc.c b/drivers/irqchip/irq-loongson-liointc.c
index 0da8716f8f24..58e43a2cd02e 100644
--- a/drivers/irqchip/irq-loongson-liointc.c
+++ b/drivers/irqchip/irq-loongson-liointc.c
@@ -177,6 +177,32 @@ static const struct irq_domain_ops acpi_irq_gc_ops = {
 	.xlate	= liointc_domain_xlate,
 };
 
+#ifdef	CONFIG_IRQ_DOMAIN_HIERARCHY
+static int liointc_domain_alloc(struct irq_domain *domain, unsigned int virq,
+				unsigned int nr_irqs, void *arg)
+{
+	int i, ret;
+	irq_hw_number_t hwirq;
+	unsigned int type = IRQ_TYPE_NONE;
+	struct irq_fwspec *fwspec = arg;
+
+	ret = irq_domain_translate_twocell(domain, fwspec, &hwirq, &type);
+	if (ret)
+		return ret;
+
+	for (i = 0; i < nr_irqs; i++)
+		irq_map_generic_chip(domain, virq + i, hwirq + i);
+
+	return 0;
+}
+
+static const struct irq_domain_ops of_irq_gc_ops = {
+	.translate	= irq_domain_translate_twocell,
+	.alloc		= liointc_domain_alloc,
+	.free		= irq_domain_free_irqs_top,
+};
+#endif
+
 static int liointc_init(phys_addr_t addr, unsigned long size, int revision,
 		struct fwnode_handle *domain_handle, struct device_node *node)
 {
@@ -218,8 +244,13 @@ static int liointc_init(phys_addr_t addr, unsigned long size, int revision,
 		domain = irq_domain_create_linear(domain_handle, LIOINTC_CHIP_IRQ,
 					&acpi_irq_gc_ops, priv);
 	else
+#ifdef	CONFIG_IRQ_DOMAIN_HIERARCHY
+		domain = irq_domain_create_linear(domain_handle, LIOINTC_CHIP_IRQ,
+					&of_irq_gc_ops, priv);
+#else
 		domain = irq_domain_create_linear(domain_handle, LIOINTC_CHIP_IRQ,
 					&irq_generic_chip_ops, priv);
+#endif
 	if (!domain) {
 		pr_err("loongson-liointc: cannot add IRQ domain\n");
 		goto out_iounmap;
-- 
2.31.1