linux-kernel - Re: [PATCH V8 0/4] PCI: vmd: Enable PCIe ASPM and LTR on select hardware

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <f277a3cf2e0c51d47c6af0a53547792d727a5a79.camel@linux.intel.com>
Date:   Wed, 07 Dec 2022 18:40:23 -0800
From:   "David E. Box" <david.e.box@...ux.intel.com>
To:     Luke Jones <luke@...nes.dev>, nirmal.patel@...ux.intel.com,
        jonathan.derrick@...ux.dev, lorenzo.pieralisi@....com,
        hch@...radead.org, kw@...ux.com, robh@...nel.org,
        bhelgaas@...gle.com, michael.a.bottini@...el.com,
        rafael@...nel.org, me@...ityamohan.in
Cc:     linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH V8 0/4] PCI: vmd: Enable PCIe ASPM and LTR on select
 hardware

On Wed, 2022-12-07 at 22:05 +1300, Luke Jones wrote:
> On Wed, 2022-11-02 at 19:18 -0700, David E. Box wrote:
> > This series adds a work around for enabling PCIe ASPM and for setting
> > PCIe
> > LTR values on VMD reserved root ports on select platforms. While
> > configuration of these capabilities is usually done by BIOS, on these
> > platforms these capabilities will not be configured because the ports
> > are
> > not visible to BIOS. This was part of an initial design that expected
> > the
> > driver to completely handle the ports, including power management.
> > However
> > on Linux those ports are still managed by the PCIe core, which has
> > the
> > expectation that they adhere to device standards including BIOS
> > configuration, leading to this problem.
> > 
> > The target platforms are Tiger Lake, Alder Lake, and Raptor Lake
> > though the
> > latter has already implemented support for configuring the LTR
> > values.
> > Meteor Lake is expected add BIOS ASPM support, eliminating the future
> > need
> > for this work around.
> > 
> > Note, the driver programs the LTRs because BIOS would also normally
> > do this
> > for devices that do not set them by default. Without this, SoC power
> > management would be blocked on those platform. This SoC specific
> > value is
> > the maximum latency required to allow the SoC to enter the deepest
> > power
> > state.
> > 
> > This patch addresses the following open bugzillas on VMD enabled
> > laptops
> > that cannot enter low power states.
> > 
> > Link: https://bugzilla.kernel.org/show_bug.cgi?id=212355
> > Link: https://bugzilla.kernel.org/show_bug.cgi?id=215063
> > Link: https://bugzilla.kernel.org/show_bug.cgi?id=213717
> > 
> > David E. Box (3):
> >   PCI: vmd: Use PCI_VDEVICE in device list
> >   PCI: vmd: Create feature grouping for client products
> >   PCI: vmd: Add quirk to configure PCIe ASPM and LTR
> > 
> > Michael Bottini (1):
> >   PCI/ASPM: Add pci_enable_link_state()
> > 
> >  drivers/pci/controller/vmd.c | 96 ++++++++++++++++++++++++++--------
> > --
> >  drivers/pci/pcie/aspm.c      | 54 ++++++++++++++++++++
> >  include/linux/pci.h          |  7 +++
> >  3 files changed, 131 insertions(+), 26 deletions(-)
> > 
> > 
> > base-commit: 247f34f7b80357943234f93f247a1ae6b6c3a740
> 
> I'd like to confirm that this patch series solves the VMD power issues
> present on the ASUS ROG M16 (GU603) laptop range (PCI dev ID = 467f).
> 
> The difference is quite drastic.
> 

Thanks for testing this Luke.

David