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Date: Thu, 8 Dec 2022 00:27:02 +0000
From: Oliver Upton <oliver.upton@...ux.dev>
To: Sean Christopherson <seanjc@...gle.com>
Cc: Marc Zyngier <maz@...nel.org>, James Morse <james.morse@....com>,
Alexandru Elisei <alexandru.elisei@....com>,
Paolo Bonzini <pbonzini@...hat.com>,
Shuah Khan <shuah@...nel.org>,
Suzuki K Poulose <suzuki.poulose@....com>,
linux-arm-kernel@...ts.infradead.org, kvmarm@...ts.cs.columbia.edu,
kvm@...r.kernel.org, kvmarm@...ts.linux.dev,
Ricardo Koller <ricarkol@...gle.com>,
linux-kselftest@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 3/4] KVM: arm64: selftests: Align VA space allocator with
TTBR0
On Thu, Dec 08, 2022 at 12:18:07AM +0000, Sean Christopherson wrote:
[...]
> Together, what about? The #ifdef is a bit gross, especially around "hi_start",
> but it's less duplicate code. And IMO, having things bundled in the same place
> makes it a lot easier for newbies (to arm64 or kernel coding in general) to
> understand what's going on and why arm64 is different.
I'd rather we not go this route. We really shouldn't make any attempt to
de-dupe something that is inherently architecture specific.
For example:
> + /*
> + * All architectures supports splitting the virtual address space into
> + * a high and a low half. Populate both halves, except for arm64 which
> + * currently uses only TTBR0_EL1 (arbitrary selftests "logic"), i.e.
> + * only has a valid low half.
> + */
> + sparsebit_num_t nr_va_bits = (1ULL << (vm->va_bits - 1)) >> vm->page_shift;
This is still wrong for arm64. When we say the VA space is 48 bits, we
really do mean that TTBR0 is able to address a full 48 bits. So this
truncates the MSB for the addressing mode.
With the code living in the arm64 side of the shop, I can also tailor
the comment to directly match the architecture to provide breadcrumbs
tying it back to the Arm ARM.
--
Thanks,
Oliver
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