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Message-ID: <20221208082955.10653-4-walker.chen@starfivetech.com>
Date: Thu, 8 Dec 2022 16:29:55 +0800
From: Walker Chen <walker.chen@...rfivetech.com>
To: <linux-riscv@...ts.infradead.org>, <linux-pm@...r.kernel.org>,
<devicetree@...r.kernel.org>
CC: Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor.dooley@...rochip.com>,
Emil Renner Berthing <emil.renner.berthing@...onical.com>,
"Rafael J . Wysocki" <rafael@...nel.org>,
Walker Chen <walker.chen@...rfivetech.com>,
<linux-kernel@...r.kernel.org>
Subject: [PATCH v1 3/3] riscv: dts: starfive: add pmu controller node
This adds the pmu controller node for the Starfive JH7110 SoC. The PMU
needs to be used by other modules such as ISP, VPU, etc.
Signed-off-by: Walker Chen <walker.chen@...rfivetech.com>
---
arch/riscv/boot/dts/starfive/jh7110.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index c22e8f1d2640..fa7b60b82d71 100644
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -356,6 +356,13 @@
#gpio-cells = <2>;
};
+ pwrc: power-controller@...30000 {
+ compatible = "starfive,jh7110-pmu";
+ reg = <0x0 0x17030000 0x0 0x10000>;
+ interrupts = <111>;
+ #power-domain-cells = <1>;
+ };
+
uart0: serial@...00000 {
compatible = "snps,dw-apb-uart";
reg = <0x0 0x10000000 0x0 0x10000>;
--
2.17.1
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