lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <Y5IIaeip81DIvEZ6@kroah.com>
Date:   Thu, 8 Dec 2022 16:53:13 +0100
From:   Greg Kroah-Hartman <gregkh@...uxfoundation.org>
To:     Quentin Schulz <foss+kernel@...il.net>
Cc:     Minas Harutyunyan <hminas@...opsys.com>,
        Quentin Schulz <quentin.schulz@...obroma-systems.com>,
        linux-kernel@...r.kernel.org, linux-usb@...r.kernel.org,
        William Wu <william.wu@...k-chips.com>,
        Bin Yang <yangbin@...k-chips.com>,
        Frank Wang <frank.wang@...k-chips.com>
Subject: Re: [PATCH 3/3] usb: dwc2: prevent core phy initialisation

On Wed, Dec 07, 2022 at 02:19:18PM +0100, Quentin Schulz wrote:
> From: Bin Yang <yangbin@...k-chips.com>
> 
> The usb phys need to be controlled dynamically on some Rockchip SoCs.
> So set the new HCD flag which prevents USB core from trying to manage
> our phys.
> 
> Signed-off-by: Bin Yang <yangbin@...k-chips.com>
> Signed-off-by: Frank Wang <frank.wang@...k-chips.com>
> Signed-off-by: Quentin Schulz <quentin.schulz@...obroma-systems.com>
> ---
>  drivers/usb/dwc2/hcd.c | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
> index 657f1f659ffaf..757a66fa32fa8 100644
> --- a/drivers/usb/dwc2/hcd.c
> +++ b/drivers/usb/dwc2/hcd.c
> @@ -5315,6 +5315,13 @@ int dwc2_hcd_init(struct dwc2_hsotg *hsotg)
>  	if (!IS_ERR_OR_NULL(hsotg->uphy))
>  		otg_set_host(hsotg->uphy->otg, &hcd->self);
>  
> +	/*
> +	 * do not manage the PHY state in the HCD core, instead let the driver
> +	 * handle this (for example if the PHY can only be turned on after a
> +	 * specific event)
> +	 */
> +	hcd->skip_phy_initialization = 1;

Wait, doesn't this mess with the phy logic for all other chips that use
this IP block?  Have you tested this on other systems?

I'd like some verification first before taking this change as it seems
very specific-platform.

thanks,

greg k-h

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ