linux-kernel - [PATCH] iommu/arm-smmu-v3: Fix incorrect description of DMB instruction

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Message-Id: <20221209135304.3306-1-jundongsong1@gmail.com>
Date:   Fri,  9 Dec 2022 21:53:04 +0800
From:   Harry Song <jundongsong1@...il.com>
To:     will@...nel.org, joro@...tes.org, robin.murphy@....com
Cc:     jundongsong1@...il.com, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org
Subject: [PATCH] iommu/arm-smmu-v3: Fix incorrect description of DMB instruction

The current comment is a description of the DSB instruction:
previous commit [1].

In the ARM architecture manual, DSB and DMB instructions
are described as follows:

DMB: The DMB instruction does not ensure the completion of
any of the memory accesses for which it ensures relative order.i

DSB: A DSB instruction is a memory barrier that ensures that
memory accesses that occur before the DSB instruction have
completed before the completion of the DSB instruction.

So after dsb is replaced with dmb, the description here is not correct.
DMB instructions do not ensure that memory access has been completed,
but rather ensure the order of instructions.

  a76a37777f2c ("iommu/arm-smmu-v3: Ensure queue is read after updating prod pointer") [1]

Signed-off-by: Harry Song <jundongsong1@...il.com>
---
 drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
index 6d5df91c5..fb229c0ab 100644
--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
+++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
@@ -139,8 +139,8 @@ static bool queue_consumed(struct arm_smmu_ll_queue *q, u32 prod)
 static void queue_sync_cons_out(struct arm_smmu_queue *q)
 {
 	/*
-	 * Ensure that all CPU accesses (reads and writes) to the queue
-	 * are complete before we update the cons pointer.
+	 * Ensure the relative order of cpu accesses (reads and writes)
+	 * to the queue before update the cons pointer.
 	 */
 	__iomb();
 	writel_relaxed(q->llq.cons, q->cons_reg);
-- 
2.25.1