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Message-ID: <167060084204.4906.10697198480362491711.tip-bot2@tip-bot2>
Date: Fri, 09 Dec 2022 15:47:22 -0000
From: "tip-bot2 for Wolfram Sang" <tip-bot2@...utronix.de>
To: linux-tip-commits@...r.kernel.org
Cc: Wolfram Sang <wsa+renesas@...g-engineering.com>,
Rob Herring <robh@...nel.org>,
Geert Uytterhoeven <geert+renesas@...der.be>,
Daniel Lezcano <daniel.lezcano@...nel.org>, x86@...nel.org,
linux-kernel@...r.kernel.org
Subject: [tip: timers/core] dt-bindings: timer: renesas,cmt: Add r8a779g0 CMT support
The following commit has been merged into the timers/core branch of tip:
Commit-ID: 83571a4389039b1be2d77655b2ce47543d407e41
Gitweb: https://git.kernel.org/tip/83571a4389039b1be2d77655b2ce47543d407e41
Author: Wolfram Sang <wsa+renesas@...g-engineering.com>
AuthorDate: Fri, 04 Nov 2022 16:06:42 +01:00
Committer: Daniel Lezcano <daniel.lezcano@...nel.org>
CommitterDate: Fri, 02 Dec 2022 13:42:32 +01:00
dt-bindings: timer: renesas,cmt: Add r8a779g0 CMT support
Signed-off-by: Wolfram Sang <wsa+renesas@...g-engineering.com>
Acked-by: Rob Herring <robh@...nel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>
Link: https://lore.kernel.org/r/20221104150642.4587-1-wsa+renesas@sang-engineering.com
Signed-off-by: Daniel Lezcano <daniel.lezcano@...nel.org>
---
Documentation/devicetree/bindings/timer/renesas,cmt.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/timer/renesas,cmt.yaml b/Documentation/devicetree/bindings/timer/renesas,cmt.yaml
index bde6c9b..a0be175 100644
--- a/Documentation/devicetree/bindings/timer/renesas,cmt.yaml
+++ b/Documentation/devicetree/bindings/timer/renesas,cmt.yaml
@@ -102,12 +102,14 @@ properties:
- enum:
- renesas,r8a779a0-cmt0 # 32-bit CMT0 on R-Car V3U
- renesas,r8a779f0-cmt0 # 32-bit CMT0 on R-Car S4-8
+ - renesas,r8a779g0-cmt0 # 32-bit CMT0 on R-Car V4H
- const: renesas,rcar-gen4-cmt0 # 32-bit CMT0 on R-Car Gen4
- items:
- enum:
- renesas,r8a779a0-cmt1 # 48-bit CMT on R-Car V3U
- renesas,r8a779f0-cmt1 # 48-bit CMT on R-Car S4-8
+ - renesas,r8a779g0-cmt1 # 48-bit CMT on R-Car V4H
- const: renesas,rcar-gen4-cmt1 # 48-bit CMT on R-Car Gen4
reg:
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