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Message-ID: <167060084346.4906.1652754113589535961.tip-bot2@tip-bot2>
Date: Fri, 09 Dec 2022 15:47:23 -0000
From: tip-bot2 for Jonathan Neuschäfer
<tip-bot2@...utronix.de>
To: linux-tip-commits@...r.kernel.org
Cc: j.neuschaefer@....net, Joel Stanley <joel@....id.au>,
Daniel Lezcano <daniel.lezcano@...nel.org>, x86@...nel.org,
linux-kernel@...r.kernel.org
Subject: [tip: timers/core] clocksource/drivers/timer-npcm7xx: Enable timer 1
clock before use
The following commit has been merged into the timers/core branch of tip:
Commit-ID: db78539fc95cf62b0b8f274368fcd8202eac91f9
Gitweb: https://git.kernel.org/tip/db78539fc95cf62b0b8f274368fcd8202eac91f9
Author: Jonathan Neuschäfer <j.neuschaefer@....net>
AuthorDate: Fri, 04 Nov 2022 17:18:46 +01:00
Committer: Daniel Lezcano <daniel.lezcano@...nel.org>
CommitterDate: Fri, 02 Dec 2022 12:48:28 +01:00
clocksource/drivers/timer-npcm7xx: Enable timer 1 clock before use
In the WPCM450 SoC, the clocks for each timer can be gated individually.
To prevent the timer 1 clock from being gated, enable it explicitly.
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@....net>
Reviewed-by: Joel Stanley <joel@....id.au>
Link: https://lore.kernel.org/r/20221104161850.2889894-3-j.neuschaefer@gmx.net
Signed-off-by: Daniel Lezcano <daniel.lezcano@...nel.org>
---
drivers/clocksource/timer-npcm7xx.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/drivers/clocksource/timer-npcm7xx.c b/drivers/clocksource/timer-npcm7xx.c
index a00520c..9af30af 100644
--- a/drivers/clocksource/timer-npcm7xx.c
+++ b/drivers/clocksource/timer-npcm7xx.c
@@ -188,6 +188,7 @@ static void __init npcm7xx_clocksource_init(void)
static int __init npcm7xx_timer_init(struct device_node *np)
{
+ struct clk *clk;
int ret;
ret = timer_of_init(np, &npcm7xx_to);
@@ -199,6 +200,15 @@ static int __init npcm7xx_timer_init(struct device_node *np)
npcm7xx_to.of_clk.rate = npcm7xx_to.of_clk.rate /
(NPCM7XX_Tx_MIN_PRESCALE + 1);
+ /* Enable the clock for timer1, if it exists */
+ clk = of_clk_get(np, 1);
+ if (clk) {
+ if (!IS_ERR(clk))
+ clk_prepare_enable(clk);
+ else
+ pr_warn("%pOF: Failed to get clock for timer1: %pe", np, clk);
+ }
+
npcm7xx_clocksource_init();
npcm7xx_clockevents_init();
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