linux-kernel - Re: [PATCH v3 2/3] arm64: dts: qcom: sdm845: align TLMM pin configuration with DT schema

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Message-ID: <0055a151-0f29-581f-f938-e7647105c3ec@linaro.org>
Date:   Fri, 9 Dec 2022 19:16:24 +0100
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     Doug Anderson <dianders@...omium.org>
Cc:     Andy Gross <agross@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konrad.dybcio@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 2/3] arm64: dts: qcom: sdm845: align TLMM pin
 configuration with DT schema

On 09/12/2022 18:53, Doug Anderson wrote:
> Hi,
> 
> On Fri, Dec 9, 2022 at 2:25 AM Krzysztof Kozlowski
> <krzysztof.kozlowski@...aro.org> wrote:
>>
>> On 02/12/2022 17:53, Doug Anderson wrote:
>>> Hi,
>>>
>>> On Fri, Dec 2, 2022 at 7:57 AM Krzysztof Kozlowski
>>> <krzysztof.kozlowski@...aro.org> wrote:
>>>>
>>>> DT schema expects TLMM pin configuration nodes to be named with
>>>> '-state' suffix and their optional children with '-pins' suffix.
>>>>
>>>> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
>>>>
>>>> ---
>>>>
>>>> Cc: Doug Anderson <dianders@...omium.org>
>>>>
>>>> Tested on Qualcomm RB3. Please kndly test a bit more on other devices.
>>>> This should not have an functional impact.
>>>>
>>>> Changes since v2:
>>>> 1. Bring back UART6 4-pin bias/drive strength to DTSI.
>>>
>>> Just to be clear, it doesn't actually belong in the DTSI, but it was
>>> there before your patch and it's fine if your patch series doesn't fix
>>> the whole world. I'm OK with this one staying in the DTSI for now just
>>> to keep things simpler.
>>>
>>> One change missing in v3 that I would have expected based on our
>>> discussion in the previous version would be to "Add UART3 4-pin mux
>>> settings for use in db845c." I think you said you would do this, but I
>>> don't see it done.
>>
>> Hm, I don't recall that. Changing db845c to usage of RTS/CTS is
>> independent problem, not related to fixes or aligning with DT schema.
> 
> It was in the message:
> 
> https://lore.kerne.org/r/68bcdf25-e8e3-f817-f213-efb0bce3f43a@linaro.org
> 
> I said:
> 
>> FWIW, I would have expected that the SoC dtsi file would get a "4-pin"
>> definition (similar to what you did with qup_uart6_4pin) and then we'd
>> use that here.
> 
> You said:
> 
>> Sure.
> 

Yes, indeed and it see now I still keep there cts-rts-pins. Somehow I
thought now we talk about UART6 or UART9...

However, the UART3 is disabled, so it will not have any effect, except
for some downstream users.

Best regards,
Krzysztof