linux-kernel - [PATCH v2 5/6] arm64: dts: qcom: sm8450: Add fallback CCI compatible

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-Id: <20221213183305.544644-5-konrad.dybcio@linaro.org>
Date:   Tue, 13 Dec 2022 19:33:04 +0100
From:   Konrad Dybcio <konrad.dybcio@...aro.org>
To:     linux-arm-msm@...r.kernel.org, andersson@...nel.org,
        agross@...nel.org, krzysztof.kozlowski@...aro.org
Cc:     marijn.suijten@...ainline.org,
        Konrad Dybcio <konrad.dybcio@...aro.org>,
        Loic Poulain <loic.poulain@...aro.org>,
        Robert Foss <robert.foss@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        linux-i2c@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: [PATCH v2 5/6] arm64: dts: qcom: sm8450: Add fallback CCI compatible

Add a fallback CCI compatible, as required by bindings.

Signed-off-by: Konrad Dybcio <konrad.dybcio@...aro.org>
---
Changes in v2:
- new patch

 arch/arm64/boot/dts/qcom/sm8450.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index a8f8ffd728d7..a9ed8443ac02 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -2554,7 +2554,7 @@ IPCC_MPROC_SIGNAL_GLINK_QMP
 		};
 
 		cci0: cci@...5000 {
-			compatible = "qcom,sm8450-cci";
+			compatible = "qcom,sm8450-cci", "qcom,msm8996-cci";
 			reg = <0 0xac15000 0 0x1000>;
 			interrupts = <GIC_SPI 460 IRQ_TYPE_EDGE_RISING>;
 			power-domains = <&camcc TITAN_TOP_GDSC>;
@@ -2593,7 +2593,7 @@ cci0_i2c1: i2c-bus@1 {
 		};
 
 		cci1: cci@...6000 {
-			compatible = "qcom,sm8450-cci";
+			compatible = "qcom,sm8450-cci", "qcom,msm8996-cci";
 			reg = <0 0xac16000 0 0x1000>;
 			interrupts = <GIC_SPI 271 IRQ_TYPE_EDGE_RISING>;
 			power-domains = <&camcc TITAN_TOP_GDSC>;
-- 
2.39.0