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Message-ID: <a2b09076-a008-f19b-80e7-2b6ed845083e@quicinc.com>
Date: Tue, 13 Dec 2022 10:36:40 +0530
From: Sai Prakash Ranjan <quic_saipraka@...cinc.com>
To: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
<andersson@...nel.org>, <robh+dt@...nel.org>,
<krzysztof.kozlowski+dt@...aro.org>, <bp@...en8.de>,
<tony.luck@...el.com>
CC: <konrad.dybcio@...aro.org>, <linux-arm-msm@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <james.morse@....com>,
<mchehab@...nel.org>, <rric@...nel.org>,
<linux-edac@...r.kernel.org>, <quic_ppareek@...cinc.com>,
<luca.weiss@...rphone.com>, <stable@...r.kernel.org>
Subject: Re: [PATCH v2 06/13] arm64: dts: qcom: sc8280xp: Fix the base
addresses of LLCC banks
On 12/12/2022 6:03 PM, Manivannan Sadhasivam wrote:
> The LLCC block has several banks each with a different base address
> and holes in between. So it is not a correct approach to cover these
> banks with a single offset/size. Instead, the individual bank's base
> address needs to be specified in devicetree with the exact size.
>
> Also, let's get rid of reg-names property as it is not needed anymore.
> The driver is expected to parse the reg field based on index to get the
> addresses of each LLCC banks.
>
> Cc: <stable@...r.kernel.org> # 6.0
> Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform")
> Reported-by: Parikshit Pareek <quic_ppareek@...cinc.com>
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
> ---
> arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 7 +++++--
> 1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> index 109c9d2b684d..f8731cbccce9 100644
> --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> @@ -1856,8 +1856,11 @@ opp-6 {
>
> system-cache-controller@...0000 {
> compatible = "qcom,sc8280xp-llcc";
> - reg = <0 0x09200000 0 0x58000>, <0 0x09600000 0 0x58000>;
> - reg-names = "llcc_base", "llcc_broadcast_base";
> + reg = <0 0x09200000 0 0x58000>, <0 0x09280000 0 0x58000>,
> + <0 0x09300000 0 0x58000>, <0 0x09380000 0 0x58000>,
> + <0 0x09400000 0 0x58000>, <0 0x09480000 0 0x58000>,
> + <0 0x09500000 0 0x58000>, <0 0x09580000 0 0x58000>,
> + <0 0x09600000 0 0x58000>;
> interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;
> };
>
Reviewed-by: Sai Prakash Ranjan <quic_saipraka@...cinc.com>
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