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Message-ID: <VI1P190MB0317ECE03D0193614AE849DD95E39@VI1P190MB0317.EURP190.PROD.OUTLOOK.COM>
Date: Tue, 13 Dec 2022 11:21:24 +0200
From: Vadym Kochan <vadym.kochan@...ision.eu>
To: Linus Walleij <linus.walleij@...aro.org>,
Adrian Hunter <adrian.hunter@...el.com>
Cc: Hu Ziji <huziji@...vell.com>, Ulf Hansson <ulf.hansson@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
linux-mmc@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, Elad Nachman <enachman@...vell.com>,
Chris Packham <chris.packham@...iedtelesis.co.nz>
Subject: Re: [PATCH v3 3/3] mmc: xenon: Fix 2G limitation on AC5 SoC
Hi Linus, Adrian,
On Tue, 13 Dec 2022 10:16:57 +0100, Linus Walleij <linus.walleij@...aro.org> wrote:
> On Mon, Dec 12, 2022 at 9:43 AM Adrian Hunter <adrian.hunter@...el.com> wrote:
>
> > >> Right but I guess I meant what about 0x3_00000000..0x3_ffffffff ?
> > >> Isn't that also in DMA_BIT_MASK(34)
> > >
> > > Yes, you are right.
> >
> > So it would fail in that case? Is it possible to use devicetree
> > reserved memory or some such, to set aside 64k for the bounce
> > buffer DMA mapping?
>
> Yups spot on, reserved-memory can be used along with the kernel
> CONFIG_DMA_CMA to achieve exactly this:
> Documentation/devicetree/bindings/reserved-memory/reserved-memory.yaml
> kernel/dma/Kconfig
>
> Yours,
> Linus Walleij
Just in case, here is an old series with reserved-memory solution:
https://lore.kernel.org/lkml/20220806085818.9873-4-vadym.kochan@plvision.eu/T/
But, what about to start with PIO solution (which is conceptually easier solution) with
checking on ram size and then develop better one ?
Thanks,
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