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Message-ID: <7d67cd32-50c7-e021-c9f8-b0aa331b6c3c@collabora.com>
Date:   Tue, 13 Dec 2022 12:25:26 +0100
From:   AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>
To:     Chen-Yu Tsai <wenst@...omium.org>,
        Matthias Brugger <matthias.bgg@...il.com>
Cc:     Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org, linux-kernel@...r.kernel.org,
        NĂ­colas F . R . A . Prado 
        <nfraprado@...labora.com>
Subject: Re: [PATCH 3/4] arm64: dts: mediatek: mt8195: Fix systimer 13 MHz
 clock description

Il 01/12/22 09:42, Chen-Yu Tsai ha scritto:
> The systimer block derives its 13 MHz clock by dividing the main 26 MHz
> oscillator clock by 2 internally, not through the TOPCKGEN clock
> controller.
> 
> On the MT8195 this divider is set either by power-on-reset or by the
> bootloader. The bootloader may then make the divider unconfigurable to,
> but can be read out by, the operating system.
> 
> Making the systimer block take the 26 MHz clock directly requires
> changing the implementations. As an ABI compatible fix, change the
> input clock of the systimer block a fixed factor divide-by-2 clock
> that takes the 26 MHz oscillator as its input.
> 
> Fixes: 37f2582883be ("arm64: dts: Add mediatek SoC mt8195 and evaluation board")
> Signed-off-by: Chen-Yu Tsai <wenst@...omium.org>

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>


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