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Message-ID: <cf40279d-cb9b-d8eb-5da1-20ace8b36e6e@quicinc.com>
Date: Tue, 13 Dec 2022 19:39:10 +0530
From: Sibi Sankar <quic_sibis@...cinc.com>
To: <andersson@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>,
<manivannan.sadhasivam@...aro.org>
CC: <agross@...nel.org>, <linux-arm-msm@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<robh+dt@...nel.org>, <konrad.dybcio@...ainline.org>,
<amit.pundir@...aro.org>, <regressions@...mhuis.info>,
<sumit.semwal@...aro.org>, <will@...nel.org>,
<catalin.marinas@....com>, <robin.murphy@....com>
Subject: Re: [PATCH 0/2] Add support for CPUCP mailbox controller
Additional patches got tagged along. Please ignore.
On 12/13/22 19:34, Sibi Sankar wrote:
> Add support for CPUSS Control Processor (CPUCP) mailbox controller
> which enables communication between AP and CPUCP by acting as a
> doorbell between them.
>
> Sibi Sankar (2):
> dt-bindings: mailbox: Add dt binding for QTI CPUCP mailbox controller
> mailbox: Add support for QTI CPUCP mailbox controller
>
> .../bindings/mailbox/qcom,cpucp-mbox.yaml | 51 ++++++
> drivers/mailbox/Kconfig | 9 ++
> drivers/mailbox/Makefile | 2 +
> drivers/mailbox/qcom-cpucp-mbox.c | 176 +++++++++++++++++++++
> 4 files changed, 238 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml
> create mode 100644 drivers/mailbox/qcom-cpucp-mbox.c
>
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