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Message-ID: <20221214154117.65714-1-hhhawa@amazon.com>
Date:   Wed, 14 Dec 2022 15:41:17 +0000
From:   Hanna Hawa <hhhawa@...zon.com>
To:     <jarkko.nikula@...ux.intel.com>,
        <andriy.shevchenko@...ux.intel.com>,
        <mika.westerberg@...ux.intel.com>, <jsd@...ihalf.com>,
        <linux-i2c@...r.kernel.org>, <linux-kernel@...r.kernel.org>
CC:     <dwmw@...zon.co.uk>, <benh@...zon.com>, <ronenk@...zon.com>,
        <talel@...zon.com>, <jonnyc@...zon.com>, <hanochu@...zon.com>,
        <farbere@...zon.com>, <itamark@...zon.com>, <lareine@...zon.com>,
        Hanna Hawa <hhhawa@...zon.com>
Subject: [PATCH v2 1/1] i2c: designware: use u64 for clock freq to avoid u32 multiplication overflow

From: Lareine Khawaly <lareine@...zon.com>

In functions i2c_dw_scl_lcnt() and i2c_dw_scl_hcnt() may have overflow
by depending on the values of the given parameters including the ic_clk.
For example in our use case where ic_clk is larger than one million,
multiplication of ic_clk * 4700 will result in 32 bit overflow.

Make the ic_clk to be u64 parameter to avoid the overflow.

Change Log v1->v2:
- Update commit message and add fix tag.

Fixes: 2373f6b9744d ("i2c-designware: split of i2c-designware.c into core and bus specific parts")
Signed-off-by: Lareine Khawaly <lareine@...zon.com>
Signed-off-by: Hanna Hawa <hhhawa@...zon.com>
---
 drivers/i2c/busses/i2c-designware-common.c | 4 ++--
 drivers/i2c/busses/i2c-designware-core.h   | 4 ++--
 drivers/i2c/busses/i2c-designware-master.c | 2 +-
 3 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/i2c/busses/i2c-designware-common.c b/drivers/i2c/busses/i2c-designware-common.c
index c023b691441e..61a6b7bb8935 100644
--- a/drivers/i2c/busses/i2c-designware-common.c
+++ b/drivers/i2c/busses/i2c-designware-common.c
@@ -332,7 +332,7 @@ void i2c_dw_adjust_bus_speed(struct dw_i2c_dev *dev)
 }
 EXPORT_SYMBOL_GPL(i2c_dw_adjust_bus_speed);
 
-u32 i2c_dw_scl_hcnt(u32 ic_clk, u32 tSYMBOL, u32 tf, int cond, int offset)
+u32 i2c_dw_scl_hcnt(u64 ic_clk, u32 tSYMBOL, u32 tf, int cond, int offset)
 {
 	/*
 	 * DesignWare I2C core doesn't seem to have solid strategy to meet
@@ -370,7 +370,7 @@ u32 i2c_dw_scl_hcnt(u32 ic_clk, u32 tSYMBOL, u32 tf, int cond, int offset)
 		return DIV_ROUND_CLOSEST(ic_clk * (tSYMBOL + tf), MICRO) - 3 + offset;
 }
 
-u32 i2c_dw_scl_lcnt(u32 ic_clk, u32 tLOW, u32 tf, int offset)
+u32 i2c_dw_scl_lcnt(u64 ic_clk, u32 tLOW, u32 tf, int offset)
 {
 	/*
 	 * Conditional expression:
diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h
index 4d3a3b464ecd..aaba6f9977b6 100644
--- a/drivers/i2c/busses/i2c-designware-core.h
+++ b/drivers/i2c/busses/i2c-designware-core.h
@@ -319,8 +319,8 @@ struct i2c_dw_semaphore_callbacks {
 };
 
 int i2c_dw_init_regmap(struct dw_i2c_dev *dev);
-u32 i2c_dw_scl_hcnt(u32 ic_clk, u32 tSYMBOL, u32 tf, int cond, int offset);
-u32 i2c_dw_scl_lcnt(u32 ic_clk, u32 tLOW, u32 tf, int offset);
+u32 i2c_dw_scl_hcnt(u64 ic_clk, u32 tSYMBOL, u32 tf, int cond, int offset);
+u32 i2c_dw_scl_lcnt(u64 ic_clk, u32 tLOW, u32 tf, int offset);
 int i2c_dw_set_sda_hold(struct dw_i2c_dev *dev);
 unsigned long i2c_dw_clk_rate(struct dw_i2c_dev *dev);
 int i2c_dw_prepare_clk(struct dw_i2c_dev *dev, bool prepare);
diff --git a/drivers/i2c/busses/i2c-designware-master.c b/drivers/i2c/busses/i2c-designware-master.c
index 16a4cd68567c..bfa2b37fb3f7 100644
--- a/drivers/i2c/busses/i2c-designware-master.c
+++ b/drivers/i2c/busses/i2c-designware-master.c
@@ -44,7 +44,7 @@ static int i2c_dw_set_timings_master(struct dw_i2c_dev *dev)
 	u32 sda_falling_time, scl_falling_time;
 	struct i2c_timings *t = &dev->timings;
 	const char *fp_str = "";
-	u32 ic_clk;
+	u64 ic_clk;
 	int ret;
 
 	ret = i2c_dw_acquire_lock(dev);
-- 
2.38.1

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