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Message-ID: <20221214161607.GA1154595-robh@kernel.org>
Date:   Wed, 14 Dec 2022 10:16:07 -0600
From:   Rob Herring <robh@...nel.org>
To:     Fabrizio Castro <fabrizio.castro.jz@...esas.com>
Cc:     Linus Walleij <linus.walleij@...aro.org>,
        Bartosz Golaszewski <brgl@...ev.pl>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Sebastian Reichel <sre@...nel.org>,
        Geert Uytterhoeven <geert+renesas@...der.be>,
        Lee Jones <lee@...nel.org>, linux-gpio@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-pm@...r.kernel.org,
        Chris Paterson <Chris.Paterson2@...esas.com>,
        Biju Das <biju.das@...renesas.com>,
        linux-renesas-soc@...r.kernel.org,
        Laurent Pinchart <laurent.pinchart@...asonboard.com>,
        Jacopo Mondi <jacopo@...ndi.org>
Subject: Re: [PATCH 3/5] dt-bindings: mfd: Add RZ/V2M PWC global registers
 bindings

On Tue, Dec 13, 2022 at 10:43:08PM +0000, Fabrizio Castro wrote:
> The RZ/V2M PWC is a multi-function device, and its software
> support relies on "syscon" and "simple-mfd".
> Add the dt-bindings for the top level device tree node.
> 
> Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@...esas.com>
> ---
>  .../bindings/mfd/renesas,rzv2m-pwc.yaml       | 70 +++++++++++++++++++
>  1 file changed, 70 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/mfd/renesas,rzv2m-pwc.yaml
> 
> diff --git a/Documentation/devicetree/bindings/mfd/renesas,rzv2m-pwc.yaml b/Documentation/devicetree/bindings/mfd/renesas,rzv2m-pwc.yaml
> new file mode 100644
> index 000000000000..a7e180bfbd83
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mfd/renesas,rzv2m-pwc.yaml
> @@ -0,0 +1,70 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/mfd/renesas,rzv2m-pwc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Renesas RZ/V2M External Power Sequence Controller (PWC)
> +
> +description: |+
> +  The PWC IP found in the RZ/V2M family of chips comes with the below
> +  capabilities
> +    - external power supply on/off sequence generation
> +    - on/off signal generation for the LPDDR4 core power supply (LPVDD)
> +    - key input signals processing
> +    - general-purpose output pins
> +
> +maintainers:
> +  - Fabrizio Castro <fabrizio.castro.jz@...esas.com>
> +
> +properties:
> +  compatible:
> +    items:
> +      - enum:
> +          - renesas,r9a09g011-pwc # RZ/V2M
> +          - renesas,r9a09g055-pwc # RZ/V2MA
> +      - const: renesas,rzv2m-pwc
> +      - const: syscon
> +      - const: simple-mfd
> +
> +  reg:
> +    maxItems: 1
> +
> +  gpio:
> +    type: object
> +    $ref: /schemas/gpio/renesas,rzv2m-pwc-gpio.yaml#
> +    description: General-Purpose Output pins controller.
> +
> +  poweroff:
> +    type: object
> +    $ref: /schemas/power/reset/renesas,rzv2m-pwc-poweroff.yaml#
> +    description: Power OFF controller.
> +
> +required:
> +  - compatible
> +  - reg
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    pwc: pwc@...00000 {
> +            compatible = "renesas,r9a09g011-pwc", "renesas,rzv2m-pwc", "syscon",
> +                         "simple-mfd";
> +            reg = <0xa3700000 0x800>;
> +
> +            gpio {
> +                    compatible = "renesas,r9a09g011-pwc-gpio",
> +                                 "renesas,rzv2m-pwc-gpio";
> +                    regmap = <&pwc>;
> +                    offset = <0x80>;
> +                    gpio-controller;
> +                    #gpio-cells = <2>;
> +            };
> +
> +            poweroff {
> +                    compatible = "renesas,r9a09g011-pwc-poweroff",
> +                                 "renesas,rzv2m-pwc-poweroff";
> +                    regmap = <&pwc>;

Why does this need to be a child node? There aren't any resources for 
it. 'regmap' is just the parent node.

Assuming this binding is complete, I don't think you need any child 
nodes. A single node can have multiple providers.

Rob

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