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Message-ID: <20221214220122.093f0690@wsk>
Date: Wed, 14 Dec 2022 22:01:22 +0100
From: Lukasz Majewski <lukma@...x.de>
To: Charles Keepax <ckeepax@...nsource.cirrus.com>
Cc: Liam Girdwood <lgirdwood@...il.com>,
Mark Brown <broonie@...nel.org>,
Jaroslav Kysela <perex@...ex.cz>,
Takashi Iwai <tiwai@...e.com>, Stephen Kitt <steve@....org>,
<patches@...nsource.cirrus.com>, <alsa-devel@...a-project.org>,
<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 2/4] ASoC: wm8940: Rewrite code to set proper clocks
Hi Charles,
> On Wed, Dec 14, 2022 at 01:37:41PM +0100, Lukasz Majewski wrote:
> > Without this change, the wm8940 driver is not working when
> > set_sysclk callback (wm8940_set_dai_sysclk) is called with
> > frequency not listed in the switch clause.
> >
> > This change adjusts this driver to allow non-standard frequency
> > set (just after the boot) being adjusted afterwards by the sound
> > system core code.
> >
> > Moreover, support for internal wm8940's PLL is provided, so it
> > can generate clocks when HOST system is not able to do it.
> >
> > Code in this commit is based on previous change done for wm8974
> > (SHA1: 51b2bb3f2568e6d9d81a001d38b8d70c2ba4af99).
> >
> > Signed-off-by: Lukasz Majewski <lukma@...x.de>
> > ---
> > struct snd_soc_component *component = dai->component;
> > + struct wm8940_priv *priv =
> > snd_soc_component_get_drvdata(component); u16 iface =
> > snd_soc_component_read(component, WM8940_IFACE) & 0xFD9F; u16
> > addcntrl = snd_soc_component_read(component, WM8940_ADDCNTRL) &
> > 0xFFF1; u16 companding = snd_soc_component_read(component,
> > WM8940_COMPANDINGCTL) & 0xFFDF; int ret;
> >
> > + priv->fs = params_rate(params);
> > + ret = wm8940_update_clocks(dai);
> > + if (ret)
> > + return ret;
> > +
>
> I think this all looks mostly good, my only slight concern would
> be the interaction with the manual functions for settings the PLL
> etc. I guess under this code, whatever manual settings were
> configured
At least on my system - those settings are not set manually. Everythig
is done in the kernel.
This is important, as I do may use several other wm89* codecs, which
drivers are inserted as modules.
> will be overwritten with the new auto settings, I
> think this should be fine as the PLL wants to be run in a pretty
> narrow band anyway, so the settings are likely identical. Do you
> have any thoughts?
This code just follows changes done for WM8974 codec. I would leave the
code as it is in this patch.
>
> Thanks,
> Charles
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@...x.de
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