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Message-ID: <20221216102654.084efc38@canb.auug.org.au>
Date:   Fri, 16 Dec 2022 10:26:54 +1100
From:   Stephen Rothwell <sfr@...b.auug.org.au>
To:     Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>,
        "H. Peter Anvin" <hpa@...or.com>,
        Peter Zijlstra <peterz@...radead.org>
Cc:     Paolo Bonzini <pbonzini@...hat.com>, KVM <kvm@...r.kernel.org>,
        "Chang S. Bae" <chang.seok.bae@...el.com>,
        Dave Hansen <dave.hansen@...ux.intel.com>,
        Jiaxi Chen <jiaxi.chen@...ux.intel.com>,
        "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Linux Next Mailing List <linux-next@...r.kernel.org>
Subject: Re: linux-next: manual merge of the kvm tree with the tip tree

Hi all,

On Thu, 1 Dec 2022 11:14:08 +1100 Stephen Rothwell <sfr@...b.auug.org.au> wrote:
> 
> Today's linux-next merge of the kvm tree got a conflict in:
> 
>   arch/x86/include/asm/cpufeatures.h
> 
> between commit:
> 
>   aa387b1b1e66 ("x86: CPUID and CR3/CR4 flags for Linear Address Masking")
> 
> from the tip tree and commits:
> 
>   6a19d7aa5821 ("x86: KVM: Advertise CMPccXADD CPUID to user space")
>   af2872f62254 ("x86: KVM: Advertise AMX-FP16 CPUID to user space")
>   5e85c4ebf206 ("x86: KVM: Advertise AVX-IFMA CPUID to user space")
> 
> from the kvm tree.
> 
> I fixed it up (see below) and can carry the fix as necessary. This
> is now fixed as far as linux-next is concerned, but any non trivial
> conflicts should be mentioned to your upstream maintainer when your tree
> is submitted for merging.  You may also want to consider cooperating
> with the maintainer of the conflicting tree to minimise any particularly
> complex conflicts.
> 
> -- 
> Cheers,
> Stephen Rothwell
> 
> diff --cc arch/x86/include/asm/cpufeatures.h
> index 11a0e06362e4,1419c4e04d45..000000000000
> --- a/arch/x86/include/asm/cpufeatures.h
> +++ b/arch/x86/include/asm/cpufeatures.h
> @@@ -311,7 -308,9 +311,10 @@@
>   /* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */
>   #define X86_FEATURE_AVX_VNNI		(12*32+ 4) /* AVX VNNI instructions */
>   #define X86_FEATURE_AVX512_BF16		(12*32+ 5) /* AVX512 BFLOAT16 instructions */
> + #define X86_FEATURE_CMPCCXADD           (12*32+ 7) /* "" CMPccXADD instructions */
> + #define X86_FEATURE_AMX_FP16		(12*32+21) /* "" AMX fp16 Support */
> + #define X86_FEATURE_AVX_IFMA            (12*32+23) /* "" Support for VPMADD52[H,L]UQ */
>  +#define X86_FEATURE_LAM			(12*32+26) /* Linear Address Masking */
>   
>   /* AMD-defined CPU features, CPUID level 0x80000008 (EBX), word 13 */
>   #define X86_FEATURE_CLZERO		(13*32+ 0) /* CLZERO instruction */

This is now a conflict between the tip tree and Libnus' tree.

-- 
Cheers,
Stephen Rothwell

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