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Date:   Thu, 15 Dec 2022 10:50:18 +0100
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     Fabrizio Castro <fabrizio.castro.jz@...esas.com>,
        Linus Walleij <linus.walleij@...aro.org>,
        Bartosz Golaszewski <brgl@...ev.pl>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Sebastian Reichel <sre@...nel.org>,
        Geert Uytterhoeven <geert+renesas@...der.be>
Cc:     Lee Jones <lee@...nel.org>, linux-gpio@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-pm@...r.kernel.org,
        Chris Paterson <Chris.Paterson2@...esas.com>,
        Biju Das <biju.das@...renesas.com>,
        linux-renesas-soc@...r.kernel.org,
        Laurent Pinchart <laurent.pinchart@...asonboard.com>,
        Jacopo Mondi <jacopo@...ndi.org>
Subject: Re: [PATCH 2/5] dt-bindings: power: reset: Add RZ/V2M PWC Power OFF
 bindings

On 13/12/2022 23:43, Fabrizio Castro wrote:
> Add dt-bindings document for the RZ/V2M PWC Power OFF driver.

Drop driver.

Subject: drop second, redundant "bindings".

> 
> Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@...esas.com>
> ---
>  .../reset/renesas,rzv2m-pwc-poweroff.yaml     | 48 +++++++++++++++++++
>  1 file changed, 48 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/power/reset/renesas,rzv2m-pwc-poweroff.yaml
> 
> diff --git a/Documentation/devicetree/bindings/power/reset/renesas,rzv2m-pwc-poweroff.yaml b/Documentation/devicetree/bindings/power/reset/renesas,rzv2m-pwc-poweroff.yaml
> new file mode 100644
> index 000000000000..12456e3e93e6
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/power/reset/renesas,rzv2m-pwc-poweroff.yaml
> @@ -0,0 +1,48 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/power/reset/renesas,rzv2m-pwc-poweroff.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Renesas RZ/V2M External Power Sequence Controller (PWC) Power OFF
> +
> +description: |+
> +  The PWC IP found in the RZ/V2M family of chips comes with the below
> +  capabilities
> +    - external power supply on/off sequence generation
> +    - on/off signal generation for the LPDDR4 core power supply (LPVDD)
> +    - key input signals processing
> +    - general-purpose output pins
> +  This node uses syscon to map the registers relevant to Power OFF (the
> +  register map is retrieved from the parent dt-node), and the node should be
> +  represented as a sub node of a "syscon", "simple-mfd" node.
> +
> +maintainers:
> +  - Fabrizio Castro <fabrizio.castro.jz@...esas.com>
> +
> +properties:
> +  compatible:
> +    items:
> +      - enum:
> +          - renesas,r9a09g011-pwc-poweroff # RZ/V2M
> +          - renesas,r9a09g055-pwc-poweroff # RZ/V2MA
> +      - const: renesas,rzv2m-pwc-poweroff
> +
> +  regmap:
> +    $ref: /schemas/types.yaml#/definitions/phandle
> +    description: |
> +      Phandle to the register map node.

This also has to go.

> +
> +required:
> +  - compatible
> +  - regmap
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    poweroff {
> +            compatible = "renesas,r9a09g011-pwc-poweroff",

Use 4 spaces for example indentation.

> +                         "renesas,rzv2m-pwc-poweroff";
> +            regmap = <&regmapnode>;
> +    };

Best regards,
Krzysztof

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