[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CA+VMnFzMgOC7sgcpQ7nZx2gaJfqqvRu8RxETguaBHN1Lg_nG_w@mail.gmail.com>
Date: Thu, 15 Dec 2022 16:15:47 +0530
From: Jagan Teki <jagan@...eble.ai>
To: Sebastian Reichel <sebastian.reichel@...labora.com>
Cc: Heiko Stuebner <heiko@...ech.de>, Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Marc Zyngier <maz@...nel.org>,
Linus Walleij <linus.walleij@...aro.org>,
Christopher Obbard <chris.obbard@...labora.com>,
Benjamin Gaignard <benjamin.gaignard@...labora.com>,
linux-rockchip@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
Kever Yang <kever.yang@...k-chips.com>, kernel@...labora.com,
Yifeng Zhao <yifeng.zhao@...k-chips.com>,
Elaine Zhang <zhangqing@...k-chips.com>,
Sugar Zhang <sugar.zhang@...k-chips.com>
Subject: Re: [PATCHv6 3/7] arm64: dts: rockchip: Add base DT for rk3588 SoC
On Wed, 14 Dec 2022 at 23:53, Sebastian Reichel
<sebastian.reichel@...labora.com> wrote:
>
> From: Kever Yang <kever.yang@...k-chips.com>
>
> This initial version supports (single core) CPU, dma, interrupts, timers,
> UART and SDHCI. In short - everything necessary to boot Linux on this
> system on chip.
>
> The DT is split into rk3588 and rk3588s, which is a reduced version
> (i.e. with less peripherals) of the former.
>
> Signed-off-by: Yifeng Zhao <yifeng.zhao@...k-chips.com>
> Signed-off-by: Elaine Zhang <zhangqing@...k-chips.com>
> Signed-off-by: Sugar Zhang <sugar.zhang@...k-chips.com>
> Signed-off-by: Kever Yang <kever.yang@...k-chips.com>
> [rebase, squash and reword commit message]
> Signed-off-by: Sebastian Reichel <sebastian.reichel@...labora.com>
> ---
> arch/arm64/boot/dts/rockchip/rk3588.dtsi | 58 +
> arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 1703 +++++++++++++++++++++
> 2 files changed, 1761 insertions(+)
> create mode 100644 arch/arm64/boot/dts/rockchip/rk3588.dtsi
> create mode 100644 arch/arm64/boot/dts/rockchip/rk3588s.dtsi
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3588.dtsi b/arch/arm64/boot/dts/rockchip/rk3588.dtsi
> new file mode 100644
> index 000000000000..d085e57fbc4c
> --- /dev/null
> +++ b/arch/arm64/boot/dts/rockchip/rk3588.dtsi
> @@ -0,0 +1,58 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
< snip>
> + qos_vop_m0: qos@...82000 {
> + compatible = "rockchip,rk3588-qos", "syscon";
> + reg = <0x0 0xfdf82000 0x0 0x20>;
> + };
> +
> + qos_vop_m1: qos@...82200 {
> + compatible = "rockchip,rk3588-qos", "syscon";
> + reg = <0x0 0xfdf82200 0x0 0x20>;
> + };
> +
> + gmac1: ethernet@...c0000 {
> + compatible = "rockchip,rk3588-gmac", "snps,dwmac-4.20a";
> + reg = <0x0 0xfe1c0000 0x0 0x10000>;
> + interrupts = <GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH 0>,
> + <GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH 0>;
> + interrupt-names = "macirq", "eth_wake_irq";
> + clocks = <&cru CLK_GMAC_125M>, <&cru CLK_GMAC_50M>,
> + <&cru PCLK_GMAC1>, <&cru ACLK_GMAC1>,
> + <&cru CLK_GMAC1_PTP_REF>;
> + clock-names = "stmmaceth", "clk_mac_ref",
> + "pclk_mac", "aclk_mac",
> + "ptp_ref";
> + power-domains = <&power RK3588_PD_GMAC>;
> + resets = <&cru SRST_A_GMAC1>;
> + reset-names = "stmmaceth";
> + rockchip,grf = <&sys_grf>;
> + rockchip,php-grf = <&php_grf>;
> + snps,axi-config = <&gmac1_stmmac_axi_setup>;
> + snps,mixed-burst;
> + snps,mtl-rx-config = <&gmac1_mtl_rx_setup>;
> + snps,mtl-tx-config = <&gmac1_mtl_tx_setup>;
> + snps,tso;
> + status = "disabled";
> +
> + mdio1: mdio {
> + compatible = "snps,dwmac-mdio";
> + #address-cells = <0x1>;
> + #size-cells = <0x0>;
> + };
One nick with dtbs_check,
ethernet@...c0000: Unevaluated properties are not allowed ('reg',
'interrupts', 'interrupt-names', 'power-domains', 'resets',
'reset-names', 'snps,axi-config', 'snps,mixed-burst',
'snps,mtl-rx-config', 'snps,mtl-tx-config', 'snps,tso', 'mdio',
'stmmac-axi-config', 'rx-queues-config', 'tx-queues-config' were
unexpected)
Jagan.
Powered by blists - more mailing lists