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Message-Id: <20221215150214.1109074-10-hugo@hugovil.com>
Date: Thu, 15 Dec 2022 10:02:10 -0500
From: Hugo Villeneuve <hugo@...ovil.com>
To: a.zummo@...ertech.it, alexandre.belloni@...tlin.com,
robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org
Cc: linux-rtc@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, hugo@...ovil.com,
Hugo Villeneuve <hvilleneuve@...onoff.com>
Subject: [PATCH v3 09/14] rtc: pcf2127: set PWRMNG value for PCF2131
From: Hugo Villeneuve <hvilleneuve@...onoff.com>
Default PWRMNG[2:0] bits are set to 000b for PCF2127/29, but to
111b for PCF2131.
Set these bits to 000b to select same mode as PCF2127/29.
Signed-off-by: Hugo Villeneuve <hvilleneuve@...onoff.com>
---
drivers/rtc/rtc-pcf2127.c | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/drivers/rtc/rtc-pcf2127.c b/drivers/rtc/rtc-pcf2127.c
index 68af4d0438b8..241189ee4a05 100644
--- a/drivers/rtc/rtc-pcf2127.c
+++ b/drivers/rtc/rtc-pcf2127.c
@@ -53,6 +53,7 @@
#define PCF2127_BIT_CTRL3_BLF BIT(2)
#define PCF2127_BIT_CTRL3_BF BIT(3)
#define PCF2127_BIT_CTRL3_BTSE BIT(4)
+#define PCF2127_CTRL3_PWRMNG_MASK GENMASK(7, 5)
/* Control register 4 */
#define PCF2131_REG_CTRL4 0x03
#define PCF2131_BIT_CTRL4_TSF4 BIT(4)
@@ -1129,6 +1130,20 @@ static int pcf2127_probe(struct device *dev, struct regmap *regmap,
regmap_clear_bits(pcf2127->regmap, PCF2127_REG_CTRL1,
PCF2127_BIT_CTRL1_POR_OVRD);
+ /* Make sure PWRMNG[2:0] is set to 000b. This is the default for
+ * PCF2127/29, but not for PCF2131 (default of 111b).
+ *
+ * PWRMNG[2:0] = 000b:
+ * battery switch-over function is enabled in standard mode;
+ * battery low detection function is enabled
+ */
+ ret = regmap_clear_bits(pcf2127->regmap, PCF2127_REG_CTRL3,
+ PCF2127_CTRL3_PWRMNG_MASK);
+ if (ret < 0) {
+ dev_err(dev, "PWRMNG config failed\n");
+ return ret;
+ }
+
ret = regmap_read(pcf2127->regmap, pcf2127->cfg->reg_clkout, &val);
if (ret < 0)
return ret;
--
2.30.2
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