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Date: Thu, 15 Dec 2022 15:54:02 +1300
From: Chris Packham <chris.packham@...iedtelesis.co.nz>
To: gregory.clement@...tlin.com, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org, pierre.gondois@....com,
vadym.kochan@...ision.eu
Cc: devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Chris Packham <chris.packham@...iedtelesis.co.nz>
Subject: [PATCH] arm64: dts: marvell: AC5/AC5X: Fix address for UART1
The correct address offset is 0x12100.
Fixes: 31be791e26cf ("arm64: dts: marvell: Add UART1-3 for AC5/AC5X")
Signed-off-by: Chris Packham <chris.packham@...iedtelesis.co.nz>
---
Not sure how this happened. I only noticed when I had a conflict in some
local patches I was rebasing against upstream. So I obviously had it
right at one point but then managed to break it in the process of
cleaning things up for submission.
arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi b/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi
index 7308f7b6b22c..8bce64069138 100644
--- a/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi
+++ b/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi
@@ -98,7 +98,7 @@ uart0: serial@...00 {
uart1: serial@...00 {
compatible = "snps,dw-apb-uart";
- reg = <0x11000 0x100>;
+ reg = <0x12100 0x100>;
reg-shift = <2>;
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
reg-io-width = <1>;
--
2.38.2
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