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Message-ID: <c2014039-f1e8-6976-33d6-52e2dd4e7b66@baylibre.com>
Date:   Fri, 16 Dec 2022 08:28:26 +0100
From:   jerome Neanne <jneanne@...libre.com>
To:     Vignesh Raghavendra <vigneshr@...com>, Nishanth Menon <nm@...com>,
        Mark Brown <broonie@...nel.org>
Cc:     Wadim Egorov <W.Egorov@...tec.de>,
        "lgirdwood@...il.com" <lgirdwood@...il.com>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "kristo@...nel.org" <kristo@...nel.org>,
        "dmitry.torokhov@...il.com" <dmitry.torokhov@...il.com>,
        "krzysztof.kozlowski+dt@...aro.org" 
        <krzysztof.kozlowski+dt@...aro.org>,
        "catalin.marinas@....com" <catalin.marinas@....com>,
        "will@...nel.org" <will@...nel.org>,
        "lee@...nel.org" <lee@...nel.org>,
        "tony@...mide.com" <tony@...mide.com>,
        "shawnguo@...nel.org" <shawnguo@...nel.org>,
        "geert+renesas@...der.be" <geert+renesas@...der.be>,
        "dmitry.baryshkov@...aro.org" <dmitry.baryshkov@...aro.org>,
        "marcel.ziswiler@...adex.com" <marcel.ziswiler@...adex.com>,
        "vkoul@...nel.org" <vkoul@...nel.org>,
        "biju.das.jz@...renesas.com" <biju.das.jz@...renesas.com>,
        "arnd@...db.de" <arnd@...db.de>,
        "jeff@...undy.com" <jeff@...undy.com>, "afd@...com" <afd@...com>,
        "khilman@...libre.com" <khilman@...libre.com>,
        "narmstrong@...libre.com" <narmstrong@...libre.com>,
        "msp@...libre.com" <msp@...libre.com>,
        "j-keerthy@...com" <j-keerthy@...com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-input@...r.kernel.org" <linux-input@...r.kernel.org>,
        "linux-omap@...r.kernel.org" <linux-omap@...r.kernel.org>
Subject: Re: [PATCH v7 1/6] DONOTMERGE: arm64: dts: ti: Add TI TPS65219 PMIC
 support for AM642 SK board.



On 16/12/2022 07:21, Vignesh Raghavendra wrote:
> 
> 
> On 16/12/22 03:11, Nishanth Menon wrote:
>> On 18:22-20221215, Mark Brown wrote:
>>> On Thu, Dec 15, 2022 at 11:54:11AM -0600, Nishanth Menon wrote:
>>>> On 16:09-20221215, Mark Brown wrote:
>>>
>>>>> That proposal looks really non-idiomatic and quite unusual, if there's a
>>>>> fixed voltage supply to the LDO I'd expect to see it modeled as a fixed
>>>>> voltage regulator.  I'm not sure what the use of bypass here is trying
>>>>> to accomplish TBH.
>>>
>>>> The problem is this - the default NVM in the PMIC is setup such that
>>>> VSET value =3.3v and bypass bit set (makes sense since the vin=3.3v).
>>>
>>> This implies no voltage drop over the LDO?  Sounds a bit suspect.
>>
>> Not the choice I'd probably have made ;)
>>
>>>
>>>> Now the constraint is bypass bit cannot be changed without the LDO
>>>> being switched off.
>>>
> 
> Per https://www.ti.com/lit/ds/symlink/tps65219.pdf (7.3.6 Linear
> Regulators).
> 
> LDOs have two modes:
> 
> 1. Load switch mode: in this case, output voltages of 1.5V up to 5.5V
> are supported.
> 
> 2 Linear regulator LDO mode where output voltage is programmable in the
> range of 0.6V to 3.4V in 50mV-steps with possibility of bypass.
> 
> (CAUTION on page 25):
> A mode change between LDO(/bypass) and LSW-mode must only be performed,
> when this regulator is disabled!
> A change between LDO and bypass-mode (supported by LDO1 and LDO2 only)
> is supported during operation.
> 
> So, seems like bypass can be toggled even with LDO on?
>I possibly miss-interpreted this caution statement which leads to that 
situation.

Your understanding sounds correct. My mistake... Sorry for that


Regards,
Jerome.

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