[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <Y5wrnzLMv5SCWPkn@smile.fi.intel.com>
Date: Fri, 16 Dec 2022 10:26:07 +0200
From: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To: Tharunkumar.Pasumarthi@...rochip.com
Cc: Kumaravel.Thiagarajan@...rochip.com, linux-kernel@...r.kernel.org,
linux-serial@...r.kernel.org, gregkh@...uxfoundation.org,
jirislaby@...nel.org, ilpo.jarvinen@...ux.intel.com,
macro@...am.me.uk, cang1@...e.co.uk, colin.i.king@...il.com,
phil.edworthy@...esas.com, biju.das.jz@...renesas.com,
geert+renesas@...der.be, lukas@...ner.de,
u.kleine-koenig@...gutronix.de, wander@...hat.com,
etremblay@...tech-controls.com, jk@...abs.org,
UNGLinuxDriver@...rochip.com
Subject: Re: [PATCH v9 tty-next 2/4] serial: 8250_pci1xxxx: Add driver for
quad-uart support
On Fri, Dec 16, 2022 at 05:40:31AM +0000, Tharunkumar.Pasumarthi@...rochip.com wrote:
> > From: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
> > Sent: Thursday, December 15, 2022 11:13 PM
...
> > > + ret = serial8250_pci_setup_port(pdev, port, 0, port_idx * 256,
> > > + 0);
> >
> > Actually isn't 0x100 better (show that there is an offset rather than a value of
> > an register)?
>
> Okay, I will so something like this,
> #define PORT_OFFSET 0x100
> ret = serial8250_pci_setup_port(pdev, port, 0, PORT_OFFSET * port_idx, 0);
Makes sense.
...
> > > + num_vectors = pci_alloc_irq_vectors(pdev, 1, max_vec_reqd,
> > PCI_IRQ_ALL_TYPES);
> > > + if (num_vectors < 0) {
> >
> > > + pci_iounmap(pdev, priv->membase);
> >
> > Here is inconsistency on how you interpret pci_*() calls when
> > pcim_enable_device() has been used. I.e. for IRQ you don't deallocate
> > resources explicitly (yes, it's done automatically anyway), but you explicitly
> > call pci_iounmap(). Choose a single approach for all of them.
>
> AFAIK call to pci_iounmap cannot be avoided since pci_ioremap_bar is not 'managed' API.
> You suggest calling pci_free_irq_vectors (even though it is not mandatory)?
Why is it not mandatory?
--
With Best Regards,
Andy Shevchenko
Powered by blists - more mailing lists