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Message-Id: <20221216183532.78933-5-nick.hawkins@hpe.com>
Date: Fri, 16 Dec 2022 12:35:30 -0600
From: nick.hawkins@....com
To: verdun@....com, nick.hawkins@....com, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org, lee@...nel.org,
linux@...linux.org.uk, linux-i2c@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org
Subject: [PATCH v1 4/6] ARM: dts: hpe: Add I2C Topology
From: Nick Hawkins <nick.hawkins@....com>
Add 9 I2C Engines, 2 MUXs, and a EEPROM to the device tree.
Signed-off-by: Nick Hawkins <nick.hawkins@....com>
---
arch/arm/boot/dts/hpe-bmc-dl360gen10.dts | 72 ++++++++++++++
arch/arm/boot/dts/hpe-gxp.dtsi | 115 +++++++++++++++++++++++
2 files changed, 187 insertions(+)
diff --git a/arch/arm/boot/dts/hpe-bmc-dl360gen10.dts b/arch/arm/boot/dts/hpe-bmc-dl360gen10.dts
index 3a7382ce40ef..d9008e2cfed3 100644
--- a/arch/arm/boot/dts/hpe-bmc-dl360gen10.dts
+++ b/arch/arm/boot/dts/hpe-bmc-dl360gen10.dts
@@ -23,4 +23,76 @@
device_type = "memory";
reg = <0x40000000 0x20000000>;
};
+
+ i2cmux@4 {
+ compatible = "i2c-mux-reg";
+ i2c-parent = <&i2c4>;
+ reg = <0xd1000074 1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ i2c4@1 {
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c4@3 {
+ reg = <3>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c4@4 {
+ reg = <4>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
+ i2cmux@6 {
+ compatible = "i2c-mux-reg";
+ i2c-parent = <&i2c6>;
+ reg = <0xd1000076 1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ i2c6@1 {
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c6@2 {
+ reg = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c6@3 {
+ reg = <3>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c6@4 {
+ reg = <4>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c6@5 {
+ reg = <5>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+};
+
+&i2c2 {
+ eeprom@50 {
+ compatible = "atmel,24c02";
+ pagesize = <8>;
+ reg = <0x50>;
+ };
};
diff --git a/arch/arm/boot/dts/hpe-gxp.dtsi b/arch/arm/boot/dts/hpe-gxp.dtsi
index cf735b3c4f35..27e68932021c 100644
--- a/arch/arm/boot/dts/hpe-gxp.dtsi
+++ b/arch/arm/boot/dts/hpe-gxp.dtsi
@@ -122,6 +122,121 @@
interrupts = <6>;
interrupt-parent = <&vic0>;
};
+
+ sysreg_system_controller: syscon@f8 {
+ compatible = "hpe,gxp-sysreg", "syscon";
+ reg = <0xf8 0x8>;
+ };
+
+ i2c0: i2c@...0 {
+ compatible = "hpe,gxp-i2c";
+ reg = <0x2000 0x70>;
+ interrupts = <9>;
+ interrupt-parent = <&vic0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ hpe,sysreg-phandle = <&sysreg_system_controller>;
+ hpe,i2c-max-bus-freq = <100000>;
+ };
+
+ i2c1: i2c@...0 {
+ compatible = "hpe,gxp-i2c";
+ reg = <0x2100 0x70>;
+ interrupts = <9>;
+ interrupt-parent = <&vic0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ hpe,sysreg-phandle = <&sysreg_system_controller>;
+ hpe,i2c-max-bus-freq = <100000>;
+ };
+
+ i2c2: i2c@...0 {
+ compatible = "hpe,gxp-i2c";
+ reg = <0x2200 0x70>;
+ interrupts = <9>;
+ interrupt-parent = <&vic0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ hpe,sysreg-phandle = <&sysreg_system_controller>;
+ hpe,i2c-max-bus-freq = <100000>;
+ };
+
+ i2c3: i2c@...0 {
+ compatible = "hpe,gxp-i2c";
+ reg = <0x2300 0x70>;
+ interrupts = <9>;
+ interrupt-parent = <&vic0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ hpe,sysreg-phandle = <&sysreg_system_controller>;
+ hpe,i2c-max-bus-freq = <100000>;
+ };
+
+ i2c4: i2c@...0 {
+ compatible = "hpe,gxp-i2c";
+ reg = <0x2400 0x70>;
+ interrupts = <9>;
+ interrupt-parent = <&vic0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ hpe,sysreg-phandle = <&sysreg_system_controller>;
+ hpe,i2c-max-bus-freq = <100000>;
+ };
+
+ i2c5: i2c@...0 {
+ compatible = "hpe,gxp-i2c";
+ reg = <0x2500 0x70>;
+ interrupts = <9>;
+ interrupt-parent = <&vic0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ hpe,sysreg-phandle = <&sysreg_system_controller>;
+ hpe,i2c-max-bus-freq = <100000>;
+ };
+
+ i2c6: i2c@...0 {
+ compatible = "hpe,gxp-i2c";
+ reg = <0x2600 0x70>;
+ interrupts = <9>;
+ interrupt-parent = <&vic0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ hpe,sysreg-phandle = <&sysreg_system_controller>;
+ hpe,i2c-max-bus-freq = <100000>;
+ };
+
+ i2c7: i2c@...0 {
+ compatible = "hpe,gxp-i2c";
+ reg = <0x2700 0x70>;
+ interrupts = <9>;
+ interrupt-parent = <&vic0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ hpe,sysreg-phandle = <&sysreg_system_controller>;
+ hpe,i2c-max-bus-freq = <100000>;
+ };
+
+ i2c8: i2c@...0 {
+ compatible = "hpe,gxp-i2c";
+ reg = <0x2800 0x70>;
+ interrupts = <9>;
+ interrupt-parent = <&vic0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ hpe,sysreg-phandle = <&sysreg_system_controller>;
+ hpe,i2c-max-bus-freq = <100000>;
+ };
+
+ i2c9: i2c@...0 {
+ compatible = "hpe,gxp-i2c";
+ reg = <0x2900 0x70>;
+ interrupts = <9>;
+ interrupt-parent = <&vic0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ hpe,sysreg-phandle = <&sysreg_system_controller>;
+ hpe,i2c-max-bus-freq = <100000>;
+ };
};
};
};
--
2.17.1
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