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Message-Id: <20221216231528.1268447-3-marijn.suijten@somainline.org>
Date: Sat, 17 Dec 2022 00:15:28 +0100
From: Marijn Suijten <marijn.suijten@...ainline.org>
To: phone-devel@...r.kernel.org, Andy Gross <agross@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Vinod Koul <vkoul@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>
Cc: ~postmarketos/upstreaming@...ts.sr.ht,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@...ainline.org>,
Konrad Dybcio <konrad.dybcio@...ainline.org>,
Martin Botka <martin.botka@...ainline.org>,
Jami Kettunen <jami.kettunen@...ainline.org>,
Marijn Suijten <marijn.suijten@...ainline.org>,
Lux Aliaga <they@...t.lgbt>,
Konrad Dybcio <konrad.dybcio@...aro.org>,
Richard Acayan <mailingradian@...il.com>,
linux-arm-msm@...r.kernel.org, dmaengine@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: [PATCH v2 2/2] arm64: dts: qcom: sm6125: Add GPI DMA nodes
From: Martin Botka <martin.botka@...ainline.org>
Add nodes for GPI DMA hosts on SM6125.
Signed-off-by: Martin Botka <martin.botka@...ainline.org>
[Marijn: reorder properties, use sdm845 fallback compatible, disable by
default, use 3 instead of 5 dma cells]
Signed-off-by: Marijn Suijten <marijn.suijten@...ainline.org>
---
arch/arm64/boot/dts/qcom/sm6125.dtsi | 37 ++++++++++++++++++++++++++++
1 file changed, 37 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi
index a205121ab4a7..abcd634c4f6d 100644
--- a/arch/arm64/boot/dts/qcom/sm6125.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi
@@ -5,6 +5,7 @@
#include <dt-bindings/clock/qcom,gcc-sm6125.h>
#include <dt-bindings/clock/qcom,rpmcc.h>
+#include <dt-bindings/dma/qcom-gpi.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/qcom-rpmpd.h>
@@ -510,6 +511,42 @@ sdhc_2: mmc@...4000 {
status = "disabled";
};
+ gpi_dma0: dma-controller@...0000 {
+ compatible = "qcom,sm6125-gpi-dma", "qcom,sdm845-gpi-dma";
+ reg = <0x04a00000 0x60000>;
+ interrupts = <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>;
+ dma-channels = <8>;
+ dma-channel-mask = <0x1f>;
+ iommus = <&apps_smmu 0x0136 0x0>;
+ #dma-cells = <3>;
+ status = "disabled";
+ };
+
+ gpi_dma1: dma-controller@...0000 {
+ compatible = "qcom,sm6125-gpi-dma", "qcom,sdm845-gpi-dma";
+ reg = <0x04c00000 0x60000>;
+ interrupts = <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>;
+ dma-channels = <8>;
+ dma-channel-mask = <0x0f>;
+ iommus = <&apps_smmu 0x0156 0x0>;
+ #dma-cells = <3>;
+ status = "disabled";
+ };
+
usb3: usb@...8800 {
compatible = "qcom,sm6125-dwc3", "qcom,dwc3";
reg = <0x04ef8800 0x400>;
--
2.39.0
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