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Message-Id: <20221216232606.2123341-3-echanude@redhat.com>
Date: Fri, 16 Dec 2022 18:26:04 -0500
From: Eric Chanudet <echanude@...hat.com>
To: Andy Gross <agross@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Konrad Dybcio <konrad.dybcio@...aro.org>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, Andrew Halaney <ahalaney@...hat.com>,
Brian Masney <bmasney@...hat.com>,
Eric Chanudet <echanude@...hat.com>
Subject: [PATCH v3 2/4] arm64: dts: qcom: sa8450p-pmics: add rtc node
Add the rtc block on the first pmic to enable the rtc for
sa8540p-ride.
Signed-off-by: Eric Chanudet <echanude@...hat.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@...aro.org>
---
arch/arm64/boot/dts/qcom/sa8540p-pmics.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sa8540p-pmics.dtsi b/arch/arm64/boot/dts/qcom/sa8540p-pmics.dtsi
index 34fc72896761..c9b8da43b237 100644
--- a/arch/arm64/boot/dts/qcom/sa8540p-pmics.dtsi
+++ b/arch/arm64/boot/dts/qcom/sa8540p-pmics.dtsi
@@ -13,6 +13,14 @@ pm8450a: pmic@0 {
#address-cells = <1>;
#size-cells = <0>;
+ rtc@...0 {
+ compatible = "qcom,pm8941-rtc";
+ reg = <0x6000>, <0x6100>;
+ reg-names = "rtc", "alarm";
+ interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
+ wakeup-source;
+ };
+
pm8450a_gpios: gpio@...0 {
compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
reg = <0xc000>;
--
2.38.1
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