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Message-ID: <Y58rDppqQEI+vZ5U@pendragon.ideasonboard.com>
Date:   Sun, 18 Dec 2022 17:00:30 +0200
From:   Laurent Pinchart <laurent.pinchart@...asonboard.com>
To:     Adam Ford <aford173@...il.com>
Cc:     linux-arm-kernel@...ts.infradead.org, aford@...conembedded.com,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Shawn Guo <shawnguo@...nel.org>,
        Sascha Hauer <s.hauer@...gutronix.de>,
        Pengutronix Kernel Team <kernel@...gutronix.de>,
        Fabio Estevam <festevam@...il.com>,
        NXP Linux Team <linux-imx@....com>,
        Lucas Stach <l.stach@...gutronix.de>,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/2] arm64: dts: imx8mp: Fix missing GPC Interrupt

Hi Adam,

Thank you for the patch.

On Sat, Dec 17, 2022 at 12:08:48PM -0600, Adam Ford wrote:
> The GPC node references an interrupt parent, but it doesn't
> state the interrupt itself.  According to the TRM, this IRQ
> is 87. This also eliminate an error detected from dt_binding_check

The interrupt isn't used by the driver as far as I can see, so I can't
test this, but the patch matches the reference manual, so

Reviewed-by: Laurent Pinchart <laurent.pinchart@...asonboard.com>

> Fixes: fc0f05124621 ("arm64: dts: imx8mp: add GPC node with GPU power domains")
> Signed-off-by: Adam Ford <aford173@...il.com>
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> index 7a6e6221f421..7a8ca56e48b6 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> @@ -524,6 +524,7 @@ gpc: gpc@...a0000 {
>  				compatible = "fsl,imx8mp-gpc";
>  				reg = <0x303a0000 0x1000>;
>  				interrupt-parent = <&gic>;
> +				interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
>  				interrupt-controller;
>  				#interrupt-cells = <3>;
>  

-- 
Regards,

Laurent Pinchart

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