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Message-Id: <U433NR.I7MNQ8Y3FNHT@somainline.org>
Date: Sun, 18 Dec 2022 12:12:30 +0100
From: Martin Botka <martin.botka@...ainline.org>
To: Marijn Suijten <marijn.suijten@...ainline.org>
Cc: phone-devel@...r.kernel.org, ~postmarketos/upstreaming@...ts.sr.ht,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@...ainline.org>,
Konrad Dybcio <konrad.dybcio@...ainline.org>,
Jami Kettunen <jami.kettunen@...ainline.org>,
Lux Aliaga <they@...t.lgbt>, Andy Gross <agross@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konrad.dybcio@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH] arm64: dts: qcom: sm6125: Reorder HSUSB PHY clocks to
match bindings
On Fri, Dec 16 2022 at 10:33:43 PM +01:00:00, Marijn Suijten
<marijn.suijten@...ainline.org> wrote:
> Reorder the clocks and corresponding names to match the QUSB2 phy
> schema, fixing the following CHECK_DTBS errors:
>
> arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dtb:
> phy@...3000: clock-names:0: 'cfg_ahb' was expected
> From schema:
> /newdata/aosp-r/kernel/mainline/kernel/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml
> arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dtb:
> phy@...3000: clock-names:1: 'ref' was expected
> From schema:
> /newdata/aosp-r/kernel/mainline/kernel/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml
>
> Fixes: cff4bbaf2a2d ("arm64: dts: qcom: Add support for SM6125")
> Signed-off-by: Marijn Suijten <marijn.suijten@...ainline.org>
> ---
> arch/arm64/boot/dts/qcom/sm6125.dtsi | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi
> b/arch/arm64/boot/dts/qcom/sm6125.dtsi
> index 7e25a4f85594..bf9e8d45ee44 100644
> --- a/arch/arm64/boot/dts/qcom/sm6125.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi
> @@ -442,9 +442,9 @@ hsusb_phy1: phy@...3000 {
> reg = <0x01613000 0x180>;
> #phy-cells = <0>;
>
> - clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
> - <&gcc GCC_AHB2PHY_USB_CLK>;
> - clock-names = "ref", "cfg_ahb";
> + clocks = <&gcc GCC_AHB2PHY_USB_CLK>,
> + <&rpmcc RPM_SMD_XO_CLK_SRC>;
> + clock-names = "cfg_ahb", "ref";
>
Reviewed-by: Martin Botka <martin.botka@...ainline.org>
-Martin
> resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
> status = "disabled";
> --
> 2.39.0
>
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