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Message-ID: <CA+V-a8ss0idLDoc+J8-Undqd+DUGrpeytenzSxV8xMs2N3dh1g@mail.gmail.com>
Date:   Mon, 19 Dec 2022 11:15:17 +0000
From:   "Lad, Prabhakar" <prabhakar.csengg@...il.com>
To:     Conor Dooley <conor@...nel.org>
Cc:     Paul Walmsley <paul.walmsley@...ive.com>,
        Palmer Dabbelt <palmer@...belt.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        Geert Uytterhoeven <geert+renesas@...der.be>,
        Magnus Damm <magnus.damm@...il.com>,
        Heiko Stuebner <heiko@...ech.de>,
        Conor Dooley <conor.dooley@...rochip.com>,
        Samuel Holland <samuel@...lland.org>,
        Guo Ren <guoren@...nel.org>, Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Jisheng Zhang <jszhang@...nel.org>,
        Atish Patra <atishp@...osinc.com>,
        Anup Patel <apatel@...tanamicro.com>,
        Andrew Jones <ajones@...tanamicro.com>,
        Nathan Chancellor <nathan@...nel.org>,
        Philipp Tomsich <philipp.tomsich@...ll.eu>,
        devicetree@...r.kernel.org, linux-riscv@...ts.infradead.org,
        linux-renesas-soc@...r.kernel.org, linux-kernel@...r.kernel.org,
        Biju Das <biju.das.jz@...renesas.com>,
        Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: Re: [PATCH v5 1/6] riscv: asm: alternative-macros: Introduce
 ALTERNATIVE_3() macro

Hi Conor,

Thank you for the review.

On Sat, Dec 17, 2022 at 9:41 PM Conor Dooley <conor@...nel.org> wrote:
>
> On Mon, Dec 12, 2022 at 11:55:00AM +0000, Prabhakar wrote:
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> >
> > Introduce ALTERNATIVE_3() macro.
> >
> > A vendor wants to replace an old_content, but another vendor has used
> > ALTERNATIVE_2() to patch its customized content at the same location.
> > In this case, this vendor can use macro ALTERNATIVE_3() and then replace
> > ALTERNATIVE_2() with ALTERNATIVE_3() to append its customized content.
> >
> > While at it update comment above ALTERNATIVE_2() macro and make it generic
> > so that the comment holds good for any new addition of ALTERNATIVE_X()
> > macros.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> > ---
> > v4->v5
> > * Rebased the patch on top of Andrew's series (now in Palmers for next-branch)
> > * Updated comment for ALTERNATIVE_x() as suggested by Heiko
> >
> > RFC v3 -> v4
> > * New patch
> > ---
> >  arch/riscv/include/asm/alternative-macros.h | 46 ++++++++++++++++++---
> >  1 file changed, 41 insertions(+), 5 deletions(-)
> >
> > diff --git a/arch/riscv/include/asm/alternative-macros.h b/arch/riscv/include/asm/alternative-macros.h
> > index 7226e2462584..a5b4691520da 100644
> > --- a/arch/riscv/include/asm/alternative-macros.h
> > +++ b/arch/riscv/include/asm/alternative-macros.h
> > @@ -50,8 +50,17 @@
> >       ALT_NEW_CONTENT \vendor_id_2, \errata_id_2, \enable_2, \new_c_2
> >  .endm
> >
> > +.macro ALTERNATIVE_CFG_3 old_c, new_c_1, vendor_id_1, errata_id_1, enable_1, \
> > +                             new_c_2, vendor_id_2, errata_id_2, enable_2,    \
> > +                             new_c_3, vendor_id_3, errata_id_3, enable_3
> > +       ALTERNATIVE_CFG_2 \old_c, \new_c_1, \vendor_id_1, \errata_id_1, \enable_1,    \
> > +                                 \new_c_2, \vendor_id_2, \errata_id_2, \enable_2
> > +       ALT_NEW_CONTENT \vendor_id_3, \errata_id_3, \enable_3, \new_c_3
> > +.endm
> > +
> >  #define __ALTERNATIVE_CFG(...)               ALTERNATIVE_CFG __VA_ARGS__
> >  #define __ALTERNATIVE_CFG_2(...)     ALTERNATIVE_CFG_2 __VA_ARGS__
> > +#define __ALTERNATIVE_CFG_3(...)     ALTERNATIVE_CFG_3 __VA_ARGS__
> >
> >  #else /* !__ASSEMBLY__ */
> >
> > @@ -98,6 +107,13 @@
> >       __ALTERNATIVE_CFG(old_c, new_c_1, vendor_id_1, errata_id_1, enable_1)   \
> >       ALT_NEW_CONTENT(vendor_id_2, errata_id_2, enable_2, new_c_2)
> >
> > +#define __ALTERNATIVE_CFG_3(old_c, new_c_1, vendor_id_1, errata_id_1, enable_1,      \
> > +                                new_c_2, vendor_id_2, errata_id_2, enable_2, \
> > +                                new_c_3, vendor_id_3, errata_id_3, enable_3) \
> > +     __ALTERNATIVE_CFG_2(old_c, new_c_1, vendor_id_1, errata_id_1, enable_1, \
> > +                                   new_c_2, vendor_id_2, errata_id_2, enable_2)      \
> > +     ALT_NEW_CONTENT(vendor_id_3, errata_id_3, enable_3, new_c_3)
> > +
> >  #endif /* __ASSEMBLY__ */
> >
> >  #define _ALTERNATIVE_CFG(old_c, new_c, vendor_id, errata_id, CONFIG_k)       \
> > @@ -108,6 +124,13 @@
> >       __ALTERNATIVE_CFG_2(old_c, new_c_1, vendor_id_1, errata_id_1, IS_ENABLED(CONFIG_k_1),   \
> >                                  new_c_2, vendor_id_2, errata_id_2, IS_ENABLED(CONFIG_k_2))
> >
> > +#define _ALTERNATIVE_CFG_3(old_c, new_c_1, vendor_id_1, errata_id_1, CONFIG_k_1,             \
> > +                               new_c_2, vendor_id_2, errata_id_2, CONFIG_k_2,                \
> > +                               new_c_3, vendor_id_3, errata_id_3, CONFIG_k_3)                \
> > +     __ALTERNATIVE_CFG_3(old_c, new_c_1, vendor_id_1, errata_id_1, IS_ENABLED(CONFIG_k_1),   \
> > +                                new_c_2, vendor_id_2, errata_id_2, IS_ENABLED(CONFIG_k_2),   \
> > +                                new_c_3, vendor_id_3, errata_id_3, IS_ENABLED(CONFIG_k_3))
> > +
> >  #else /* CONFIG_RISCV_ALTERNATIVE */
> >  #ifdef __ASSEMBLY__
> >
> > @@ -152,15 +175,28 @@
> >       _ALTERNATIVE_CFG(old_content, new_content, vendor_id, errata_id, CONFIG_k)
> >
> >  /*
> > - * A vendor wants to replace an old_content, but another vendor has used
> > - * ALTERNATIVE() to patch its customized content at the same location. In
> > - * this case, this vendor can create a new macro ALTERNATIVE_2() based
> > - * on the following sample code and then replace ALTERNATIVE() with
> > - * ALTERNATIVE_2() to append its customized content.
> > + * ALTERNATIVE_x macros allow providing multiple replacement options
> > + * for an ALTERNATIVE code section. This is helpful if multiple
> > + * implementation variants for the same functionality exist for
> > + * different cpu cores.
>
> I think this last sentence should be:
> "This is helpful if multiple implementation variants exist for the same
> functionality."
> I don't think CPU cores is the right level of "granularity".
>
Ok, I'll update it as above.

> > + *
> > + * Usage:
> > + *   ALTERNATIVE_x(old_content,
> > + *      new_content1, vendor_id1, errata_id1, CONFIG_k1,
> > + *      new_content2, vendor_id2, errata_id2, CONFIG_k2,
> > + *      ...
> > + *      new_contentx, vendor_idx, errata_idx, CONFIG_kx)
> >   */
> >  #define ALTERNATIVE_2(old_content, new_content_1, vendor_id_1, errata_id_1, CONFIG_k_1,              \
> >                                  new_content_2, vendor_id_2, errata_id_2, CONFIG_k_2)         \
> >       _ALTERNATIVE_CFG_2(old_content, new_content_1, vendor_id_1, errata_id_1, CONFIG_k_1,    \
> >                                       new_content_2, vendor_id_2, errata_id_2, CONFIG_k_2)
> >
> > +#define ALTERNATIVE_3(old_content, new_content_1, vendor_id_1, errata_id_1, CONFIG_k_1,              \
> > +                                new_content_2, vendor_id_2, errata_id_2, CONFIG_k_2,         \
> > +                                new_content_3, vendor_id_3, errata_id_3, CONFIG_k_3)         \
> > +       _ALTERNATIVE_CFG_3(old_content, new_content_1, vendor_id_1, errata_id_1, CONFIG_k_1,  \
> > +                                       new_content_2, vendor_id_2, errata_id_2, CONFIG_k_2,  \
> > +                                       new_content_3, vendor_id_3, errata_id_3, CONFIG_k_3)
>
> btw, why is this indented with spaces when the line above it is indented
> with tabs? (At least, that is how it appears in mutt).
>
I'll update it with spaces.

> With those minor bits & the suggested fixes from Drew/Geert:
> Reviewed-by: Conor Dooley <conor.dooley@...rochip.com>
>
Cheers,
Prabhakar

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