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Message-Id: <20221219191000.2570545-1-echanude@redhat.com>
Date: Mon, 19 Dec 2022 14:09:57 -0500
From: Eric Chanudet <echanude@...hat.com>
To: Andy Gross <agross@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Konrad Dybcio <konrad.dybcio@...aro.org>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, Andrew Halaney <ahalaney@...hat.com>,
Brian Masney <bmasney@...hat.com>,
Eric Chanudet <echanude@...hat.com>
Subject: [PATCH v4 0/4] arm64: dts: qcom: enable sa8540p-ride rtc
Enable sa8540p-ride rtc on pmic@0.
sa8540p base boards share the same pmics description, currently in
pm8450a.dtsi. Rename the file to make this explicit and use it in both
sa8540p-ride.dts and sa8295p-adp.dts.
Add the missing offset where appropriate for the alarm register bank in
other qcom,pm8941-rtc description.
Changes since v3:
- Amend patch #1 incorrect description.
Changes since v2:
- rename pm8450a.dtsi to sa8540p-pmics.dtsi.
Changes since v1:
- Add "alarm" register bank offset at 0x6100 in qcom,pm8941-rtc
descriptions.
Eric Chanudet (4):
arm64: dts: qcom: rename pm8450a dtsi to sa8540p-pmics
arm64: dts: qcom: sa8450p-pmics: add rtc node
arm64: dts: qcom: sa8295p-adp: use sa8540p-pmics
arm64: dts: qcom: pm8941-rtc add alarm register
arch/arm64/boot/dts/qcom/pm8150.dtsi | 2 +-
arch/arm64/boot/dts/qcom/pm8916.dtsi | 3 +-
arch/arm64/boot/dts/qcom/pm8950.dtsi | 2 +-
arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi | 2 +-
arch/arm64/boot/dts/qcom/pmp8074.dtsi | 2 +-
arch/arm64/boot/dts/qcom/pms405.dtsi | 2 +-
arch/arm64/boot/dts/qcom/sa8295p-adp.dts | 79 +------------------
.../qcom/{pm8450a.dtsi => sa8540p-pmics.dtsi} | 8 ++
arch/arm64/boot/dts/qcom/sa8540p-ride.dts | 2 +-
9 files changed, 17 insertions(+), 85 deletions(-)
rename arch/arm64/boot/dts/qcom/{pm8450a.dtsi => sa8540p-pmics.dtsi} (90%)
--
2.38.1
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