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Message-Id: <20221219220223.3982176-8-elliott@hpe.com>
Date: Mon, 19 Dec 2022 16:02:17 -0600
From: Robert Elliott <elliott@....com>
To: herbert@...dor.apana.org.au, davem@...emloft.net, Jason@...c4.com,
ardb@...nel.org, ap420073@...il.com, David.Laight@...LAB.COM,
ebiggers@...nel.org, tim.c.chen@...ux.intel.com, peter@...jl.ca,
tglx@...utronix.de, mingo@...hat.com, bp@...en8.de,
dave.hansen@...ux.intel.com
Cc: linux-crypto@...r.kernel.org, x86@...nel.org,
linux-kernel@...r.kernel.org, Robert Elliott <elliott@....com>
Subject: [PATCH 07/13] crypto: x86/ghash - restructure FPU context saving
Wrap each of the calls to clmul_hash_update and clmul_ghash__mul
in its own set of kernel_fpu_begin and kernel_fpu_end calls, preparing
to limit the amount of data processed by each _update call to avoid
RCU stalls.
This is more like how polyval-clmulni_glue is structured.
Fixes: 0e1227d356e9 ("crypto: ghash - Add PCLMULQDQ accelerated implementation")
Suggested-by: Herbert Xu <herbert@...dor.apana.org.au>
Signed-off-by: Robert Elliott <elliott@....com>
---
arch/x86/crypto/ghash-clmulni-intel_glue.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/x86/crypto/ghash-clmulni-intel_glue.c b/arch/x86/crypto/ghash-clmulni-intel_glue.c
index beac4b2eddf6..1bfde099de0f 100644
--- a/arch/x86/crypto/ghash-clmulni-intel_glue.c
+++ b/arch/x86/crypto/ghash-clmulni-intel_glue.c
@@ -80,7 +80,6 @@ static int ghash_update(struct shash_desc *desc,
struct ghash_ctx *ctx = crypto_shash_ctx(desc->tfm);
u8 *dst = dctx->buffer;
- kernel_fpu_begin();
if (dctx->bytes) {
int n = min(srclen, dctx->bytes);
u8 *pos = dst + (GHASH_BLOCK_SIZE - dctx->bytes);
@@ -91,10 +90,14 @@ static int ghash_update(struct shash_desc *desc,
while (n--)
*pos++ ^= *src++;
- if (!dctx->bytes)
+ if (!dctx->bytes) {
+ kernel_fpu_begin();
clmul_ghash_mul(dst, &ctx->shash);
+ kernel_fpu_end();
+ }
}
+ kernel_fpu_begin();
clmul_ghash_update(dst, src, srclen, &ctx->shash);
kernel_fpu_end();
--
2.38.1
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