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Message-ID: <3e7ad9b4-9962-2eea-d6f2-c8f0cb7c121d@intel.com>
Date: Mon, 19 Dec 2022 14:08:32 -0800
From: Jacob Keller <jacob.e.keller@...el.com>
To: Arun Ramadoss <arun.ramadoss@...rochip.com>,
<linux-kernel@...r.kernel.org>, <netdev@...r.kernel.org>
CC: <woojung.huh@...rochip.com>, <UNGLinuxDriver@...rochip.com>,
<andrew@...n.ch>, <vivien.didelot@...il.com>,
<f.fainelli@...il.com>, <olteanv@...il.com>, <davem@...emloft.net>,
<edumazet@...gle.com>, <kuba@...nel.org>, <pabeni@...hat.com>,
<linux@...linux.org.uk>, <Tristram.Ha@...rochip.com>,
<richardcochran@...il.com>, <ceggers@...i.de>
Subject: Re: [Patch net-next v4 01/13] net: dsa: microchip: ptp: add the posix
clock support
On 12/12/2022 2:26 AM, Arun Ramadoss wrote:
> +static int ksz_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)
> +{
> + struct ksz_ptp_data *ptp_data = ptp_caps_to_data(ptp);
> + struct ksz_device *dev = ptp_data_to_ksz_dev(ptp_data);
> + int ret;
> +
> + mutex_lock(&ptp_data->lock);
> +
> + if (scaled_ppm) {
> + s64 ppb, adj;
> + u32 data32;
> +
> + /* see scaled_ppm_to_ppb() in ptp_clock.c for details */
> + ppb = 1 + scaled_ppm;
> + ppb *= 125;
> + ppb *= KSZ_PTP_INC_NS;
> + ppb <<= KSZ_PTP_SUBNS_BITS - 13;
> + adj = div_s64(ppb, NSEC_PER_SEC);
> +
> + data32 = abs(adj);
> + data32 &= PTP_SUBNANOSEC_M;
> + if (adj >= 0)
> + data32 |= PTP_RATE_DIR;
> +
Can you use adjust_by_scaled_ppm or diff_by_scalled_ppm? These work by
defining the base increment for your device to achieve nominal
nanoseconds, and then perform the multiple+divide to calculate the
modified adjustment based on scaled_ppm. The diff_by_scaled_ppm looks
like what you want as it takes a base, the scaled adjustment factor and
then exports the diff as the 3rd argument. It returns true if the
difference is negative so ou can use that to determine if you need to
add the PTP_RATE_DIR flag.
If for some reason diff_by_scaled_ppm isn't sufficient for your
hardware, at least use scaled_ppm_to_ppb to get the ppb value instead of
open coding the conversion.
Thanks,
Jake
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