linux-kernel - Re: [PATCH v3 07/11] dt-bindings: clock: Add StarFive JH7110 system clock and reset generator

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Message-ID: <167156716420.1009655.13780070128515127974.robh@kernel.org>
Date:   Tue, 20 Dec 2022 14:12:44 -0600
From:   Rob Herring <robh@...nel.org>
To:     Hal Feng <hal.feng@...rfivetech.com>
Cc:     Stephen Boyd <sboyd@...nel.org>, Rob Herring <robh+dt@...nel.org>,
        devicetree@...r.kernel.org, Conor Dooley <conor@...nel.org>,
        linux-riscv@...ts.infradead.org,
        Palmer Dabbelt <palmer@...belt.com>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Emil Renner Berthing <emil.renner.berthing@...onical.com>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org,
        Michael Turquette <mturquette@...libre.com>
Subject: Re: [PATCH v3 07/11] dt-bindings: clock: Add StarFive JH7110 system
 clock and reset generator


On Tue, 20 Dec 2022 08:50:50 +0800, Hal Feng wrote:
> From: Emil Renner Berthing <kernel@...il.dk>
> 
> Add bindings for the system clock and reset generator (SYSCRG) on the
> JH7110 RISC-V SoC by StarFive Ltd.
> 
> Signed-off-by: Emil Renner Berthing <kernel@...il.dk>
> Signed-off-by: Hal Feng <hal.feng@...rfivetech.com>
> ---
>  .../clock/starfive,jh7110-syscrg.yaml         |  80 +++++++
>  MAINTAINERS                                   |   8 +-
>  .../dt-bindings/clock/starfive,jh7110-crg.h   | 207 ++++++++++++++++++
>  .../dt-bindings/reset/starfive,jh7110-crg.h   | 142 ++++++++++++
>  4 files changed, 434 insertions(+), 3 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml
>  create mode 100644 include/dt-bindings/clock/starfive,jh7110-crg.h
>  create mode 100644 include/dt-bindings/reset/starfive,jh7110-crg.h
> 

Reviewed-by: Rob Herring <robh@...nel.org>