| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Date: Tue, 20 Dec 2022 22:31:05 +0000
From: Conor Dooley <conor@...nel.org>
To: Hal Feng <hal.feng@...rfivetech.com>
Cc: linux-riscv@...ts.infradead.org, devicetree@...r.kernel.org,
linux-clk@...r.kernel.org, Palmer Dabbelt <palmer@...belt.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Stephen Boyd <sboyd@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
Philipp Zabel <p.zabel@...gutronix.de>,
Emil Renner Berthing <emil.renner.berthing@...onical.com>,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 05/11] reset: starfive: Rename "jh7100" to "jh71x0"
for the common code
On Tue, Dec 20, 2022 at 08:50:48AM +0800, Hal Feng wrote:
> From: Emil Renner Berthing <kernel@...il.dk>
>
> For the common code will be shared with the StarFive JH7110 SoC.
>
> Signed-off-by: Emil Renner Berthing <kernel@...il.dk>
> Signed-off-by: Hal Feng <hal.feng@...rfivetech.com>
Label on the tin seems to match the contents.
Reviewed-by: Conor Dooley <conor.dooley@...rochip.com>
Thanks,
Conor.
> ---
> .../reset/starfive/reset-starfive-jh7100.c | 2 +-
> .../reset/starfive/reset-starfive-jh71x0.c | 50 +++++++++----------
> .../reset/starfive/reset-starfive-jh71x0.h | 2 +-
> 3 files changed, 27 insertions(+), 27 deletions(-)
>
> diff --git a/drivers/reset/starfive/reset-starfive-jh7100.c b/drivers/reset/starfive/reset-starfive-jh7100.c
> index 9d7cb4ed8869..5f06e5ae3346 100644
> --- a/drivers/reset/starfive/reset-starfive-jh7100.c
> +++ b/drivers/reset/starfive/reset-starfive-jh7100.c
> @@ -51,7 +51,7 @@ static int __init jh7100_reset_probe(struct platform_device *pdev)
> if (IS_ERR(base))
> return PTR_ERR(base);
>
> - return reset_starfive_jh7100_register(&pdev->dev, pdev->dev.of_node,
> + return reset_starfive_jh71x0_register(&pdev->dev, pdev->dev.of_node,
> base + JH7100_RESET_ASSERT0,
> base + JH7100_RESET_STATUS0,
> jh7100_reset_asserted,
> diff --git a/drivers/reset/starfive/reset-starfive-jh71x0.c b/drivers/reset/starfive/reset-starfive-jh71x0.c
> index ee8c28f9bcb5..1f201c612583 100644
> --- a/drivers/reset/starfive/reset-starfive-jh71x0.c
> +++ b/drivers/reset/starfive/reset-starfive-jh71x0.c
> @@ -1,6 +1,6 @@
> // SPDX-License-Identifier: GPL-2.0-or-later
> /*
> - * Reset driver for the StarFive JH7100 SoC
> + * Reset driver for the StarFive JH71X0 SoCs
> *
> * Copyright (C) 2021 Emil Renner Berthing <kernel@...il.dk>
> */
> @@ -13,7 +13,7 @@
> #include <linux/reset-controller.h>
> #include <linux/spinlock.h>
>
> -struct jh7100_reset {
> +struct jh71x0_reset {
> struct reset_controller_dev rcdev;
> /* protect registers against concurrent read-modify-write */
> spinlock_t lock;
> @@ -22,16 +22,16 @@ struct jh7100_reset {
> const u64 *asserted;
> };
>
> -static inline struct jh7100_reset *
> -jh7100_reset_from(struct reset_controller_dev *rcdev)
> +static inline struct jh71x0_reset *
> +jh71x0_reset_from(struct reset_controller_dev *rcdev)
> {
> - return container_of(rcdev, struct jh7100_reset, rcdev);
> + return container_of(rcdev, struct jh71x0_reset, rcdev);
> }
>
> -static int jh7100_reset_update(struct reset_controller_dev *rcdev,
> +static int jh71x0_reset_update(struct reset_controller_dev *rcdev,
> unsigned long id, bool assert)
> {
> - struct jh7100_reset *data = jh7100_reset_from(rcdev);
> + struct jh71x0_reset *data = jh71x0_reset_from(rcdev);
> unsigned long offset = BIT_ULL_WORD(id);
> u64 mask = BIT_ULL_MASK(id);
> void __iomem *reg_assert = data->assert + offset * sizeof(u64);
> @@ -60,34 +60,34 @@ static int jh7100_reset_update(struct reset_controller_dev *rcdev,
> return ret;
> }
>
> -static int jh7100_reset_assert(struct reset_controller_dev *rcdev,
> +static int jh71x0_reset_assert(struct reset_controller_dev *rcdev,
> unsigned long id)
> {
> - return jh7100_reset_update(rcdev, id, true);
> + return jh71x0_reset_update(rcdev, id, true);
> }
>
> -static int jh7100_reset_deassert(struct reset_controller_dev *rcdev,
> +static int jh71x0_reset_deassert(struct reset_controller_dev *rcdev,
> unsigned long id)
> {
> - return jh7100_reset_update(rcdev, id, false);
> + return jh71x0_reset_update(rcdev, id, false);
> }
>
> -static int jh7100_reset_reset(struct reset_controller_dev *rcdev,
> +static int jh71x0_reset_reset(struct reset_controller_dev *rcdev,
> unsigned long id)
> {
> int ret;
>
> - ret = jh7100_reset_assert(rcdev, id);
> + ret = jh71x0_reset_assert(rcdev, id);
> if (ret)
> return ret;
>
> - return jh7100_reset_deassert(rcdev, id);
> + return jh71x0_reset_deassert(rcdev, id);
> }
>
> -static int jh7100_reset_status(struct reset_controller_dev *rcdev,
> +static int jh71x0_reset_status(struct reset_controller_dev *rcdev,
> unsigned long id)
> {
> - struct jh7100_reset *data = jh7100_reset_from(rcdev);
> + struct jh71x0_reset *data = jh71x0_reset_from(rcdev);
> unsigned long offset = BIT_ULL_WORD(id);
> u64 mask = BIT_ULL_MASK(id);
> void __iomem *reg_status = data->status + offset * sizeof(u64);
> @@ -96,25 +96,25 @@ static int jh7100_reset_status(struct reset_controller_dev *rcdev,
> return !((value ^ data->asserted[offset]) & mask);
> }
>
> -static const struct reset_control_ops jh7100_reset_ops = {
> - .assert = jh7100_reset_assert,
> - .deassert = jh7100_reset_deassert,
> - .reset = jh7100_reset_reset,
> - .status = jh7100_reset_status,
> +static const struct reset_control_ops jh71x0_reset_ops = {
> + .assert = jh71x0_reset_assert,
> + .deassert = jh71x0_reset_deassert,
> + .reset = jh71x0_reset_reset,
> + .status = jh71x0_reset_status,
> };
>
> -int reset_starfive_jh7100_register(struct device *dev, struct device_node *of_node,
> +int reset_starfive_jh71x0_register(struct device *dev, struct device_node *of_node,
> void __iomem *assert, void __iomem *status,
> const u64 *asserted, unsigned int nr_resets,
> struct module *owner)
> {
> - struct jh7100_reset *data;
> + struct jh71x0_reset *data;
>
> data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
> if (!data)
> return -ENOMEM;
>
> - data->rcdev.ops = &jh7100_reset_ops;
> + data->rcdev.ops = &jh71x0_reset_ops;
> data->rcdev.owner = owner;
> data->rcdev.nr_resets = nr_resets;
> data->rcdev.dev = dev;
> @@ -127,4 +127,4 @@ int reset_starfive_jh7100_register(struct device *dev, struct device_node *of_no
>
> return devm_reset_controller_register(dev, &data->rcdev);
> }
> -EXPORT_SYMBOL_GPL(reset_starfive_jh7100_register);
> +EXPORT_SYMBOL_GPL(reset_starfive_jh71x0_register);
> diff --git a/drivers/reset/starfive/reset-starfive-jh71x0.h b/drivers/reset/starfive/reset-starfive-jh71x0.h
> index 1fc5a648c8d8..ac9e80dd3f59 100644
> --- a/drivers/reset/starfive/reset-starfive-jh71x0.h
> +++ b/drivers/reset/starfive/reset-starfive-jh71x0.h
> @@ -6,7 +6,7 @@
> #ifndef __RESET_STARFIVE_JH71X0_H
> #define __RESET_STARFIVE_JH71X0_H
>
> -int reset_starfive_jh7100_register(struct device *dev, struct device_node *of_node,
> +int reset_starfive_jh71x0_register(struct device *dev, struct device_node *of_node,
> void __iomem *assert, void __iomem *status,
> const u64 *asserted, unsigned int nr_resets,
> struct module *owner);
> --
> 2.38.1
>
>
Download attachment "signature.asc" of type "application/pgp-signature" (229 bytes)
Powered by blists - more mailing lists