linux-kernel - RE: [PATCH v2 2/2] usb: dwc2: prevent core PHY initialization on Rockchip

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Message-ID: <BYAPR12MB339982A244FBA1178423E529A7EA9@BYAPR12MB3399.namprd12.prod.outlook.com>
Date:   Tue, 20 Dec 2022 06:02:34 +0000
From:   Minas Harutyunyan <Minas.Harutyunyan@...opsys.com>
To:     Quentin Schulz <foss+kernel@...il.net>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>
CC:     "linux-usb@...r.kernel.org" <linux-usb@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Bin Yang <yangbin@...k-chips.com>,
        Quentin Schulz <quentin.schulz@...obroma-systems.com>
Subject: RE: [PATCH v2 2/2] usb: dwc2: prevent core PHY initialization on
 Rockchip

Hi Quentin,

On 12/16/2022 8:29 PM, Quentin Schulz <foss+kernel@...il.net> wrote:
>From: Quentin Schulz <foss+kernel@...il.net>
>Sent: Friday, December 16, 2022 8:29 PM
>To: Minas Harutyunyan <hminas@...opsys.com>; Greg Kroah-Hartman
><gregkh@...uxfoundation.org>
>Cc: Quentin Schulz <foss+kernel@...il.net>; linux-usb@...r.kernel.org;
>linux-kernel@...r.kernel.org; Bin Yang <yangbin@...k-chips.com>; Quentin
>Schulz <quentin.schulz@...obroma-systems.com>
>Subject: [PATCH v2 2/2] usb: dwc2: prevent core PHY initialization on
>Rockchip
>
>From: Quentin Schulz <quentin.schulz@...obroma-systems.com>
>
>In Rockchip vendor kernel, the core PHY initialization is disabled with the
>following justification:
>
> The usb phys need to be controlled dynamically on some Rockchip SoCs.
> So set the new HCD flag which prevents USB core from trying to manage  our
>phys.
>
>This is required to get USB gadget working in dual-role mode on Ringneck
>PX30 SoM on a Haikou Devkit.
>
>Cc: Bin Yang <yangbin@...k-chips.com>
>Signed-off-by: Quentin Schulz <quentin.schulz@...obroma-systems.com>
>---
> drivers/usb/dwc2/params.c | 1 +
> 1 file changed, 1 insertion(+)
>
>diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c index
>9ed9fd956940..9095437b3236 100644
>--- a/drivers/usb/dwc2/params.c
>+++ b/drivers/usb/dwc2/params.c
>@@ -117,6 +117,7 @@ static void dwc2_set_rk_params(struct dwc2_hsotg *hsotg)
> 	p->lpm_clock_gating = false;
> 	p->besl = false;
> 	p->hird_threshold_en = false;
>+	p->hcd_skip_phy_initialization = 1;

I'm not familiar with all "rk" platforms, but are you sure that
p->hcd_skip_phy_initialization = 1 required for all of them?

> }
>
> static void dwc2_set_ltq_params(struct dwc2_hsotg *hsotg)
>
>--
>2.38.1

To avoid any misinterpretation please add to dwc2_set_default_params()
function setting hcd_skip_phy_initialization to 0.

Thanks,
Minas