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Message-ID: <1671618061-6329-2-git-send-email-quic_srivasam@quicinc.com>
Date:   Wed, 21 Dec 2022 15:51:00 +0530
From:   Srinivasa Rao Mandadapu <quic_srivasam@...cinc.com>
To:     <swboyd@...omium.org>, <agross@...nel.org>, <andersson@...nel.org>,
        <robh+dt@...nel.org>, <broonie@...nel.org>,
        <quic_plai@...cinc.com>, <krzysztof.kozlowski+dt@...aro.org>,
        <konrad.dybcio@...ainline.org>, <mturquette@...libre.com>,
        <sboyd@...nel.org>, <linux-arm-msm@...r.kernel.org>,
        <linux-clk@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <quic_rohkumar@...cinc.com>
CC:     Srinivasa Rao Mandadapu <quic_srivasam@...cinc.com>
Subject: [PATCH 1/2] dt-bindings: clock: SC7280:  Add resets for LPASS audio clock controller

Add support for LPASS audio clock gating for RX/TX/SWA core bus clocks
for audioreach based SC7280 platforms.

Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@...cinc.com>
---
 Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml
index 6151fde..b9be5f1 100644
--- a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml
@@ -31,6 +31,9 @@ properties:
   '#clock-cells':
     const: 1
 
+  '#reset-cells':
+    const: 1
+
   reg:
     items:
       - description: LPASS qdsp6ss register
@@ -61,5 +64,6 @@ examples:
       clocks = <&gcc GCC_CFG_NOC_LPASS_CLK>;
       clock-names = "iface";
       #clock-cells = <1>;
+      #reset-cells = <1>;
     };
 ...
-- 
2.7.4

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