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Message-ID: <6b650bcd-d063-9998-442a-3705c0654d73@gmail.com>
Date: Wed, 21 Dec 2022 14:09:29 +0100
From: Matthias Brugger <matthias.bgg@...il.com>
To: Allen-KH Cheng <allen-kh.cheng@...iatek.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>
Cc: Project_Global_Chrome_Upstream_Group@...iatek.com,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, linux-mediatek@...ts.infradead.org,
hsinyi@...omium.org
Subject: Re: [PATCH] arm64: dts: mediatek: mt8186: Add crypto support for eMMC
controller
On 21/12/2022 11:48, Allen-KH Cheng wrote:
> For crypto support, add a crypto clock of the inline crypto engine and
> expand the register size in the eMMC controller.
>
> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@...iatek.com>
Applied, thanks!
> ---
> arch/arm64/boot/dts/mediatek/mt8186.dtsi | 7 ++++---
> 1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
> index c326aeb33a10..88b6191e1aa0 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
> @@ -662,12 +662,13 @@
> mmc0: mmc@...30000 {
> compatible = "mediatek,mt8186-mmc",
> "mediatek,mt8183-mmc";
> - reg = <0 0x11230000 0 0x1000>,
> + reg = <0 0x11230000 0 0x10000>,
> <0 0x11cd0000 0 0x1000>;
> clocks = <&topckgen CLK_TOP_MSDC50_0>,
> <&infracfg_ao CLK_INFRA_AO_MSDC0>,
> - <&infracfg_ao CLK_INFRA_AO_MSDC0_SRC>;
> - clock-names = "source", "hclk", "source_cg";
> + <&infracfg_ao CLK_INFRA_AO_MSDC0_SRC>,
> + <&infracfg_ao CLK_INFRA_AO_MSDCFDE>;
> + clock-names = "source", "hclk", "source_cg", "crypto";
> interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH 0>;
> assigned-clocks = <&topckgen CLK_TOP_MSDC50_0>;
> assigned-clock-parents = <&apmixedsys CLK_APMIXED_MSDCPLL>;
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