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Message-ID: <CAMuHMdWpViKrCmnO-X0BTemJWqhmNZ-D5anzitJh6atbnFB6dQ@mail.gmail.com>
Date: Wed, 21 Dec 2022 16:01:50 +0100
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Fabrizio Castro <fabrizio.castro.jz@...esas.com>
Cc: Ulf Hansson <ulf.hansson@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Geert Uytterhoeven <geert+renesas@...der.be>,
Phil Edworthy <phil.edworthy@...esas.com>,
Magnus Damm <magnus.damm@...il.com>,
Wolfram Sang <wsa+renesas@...g-engineering.com>,
linux-mmc@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-renesas-soc@...r.kernel.org,
linux-clk@...r.kernel.org,
Chris Paterson <Chris.Paterson2@...esas.com>,
Biju Das <biju.das@...renesas.com>,
Laurent Pinchart <laurent.pinchart@...asonboard.com>,
Jacopo Mondi <jacopo@...ndi.org>
Subject: Re: [PATCH 1/4] clk: renesas: r9a09g011: Add SDHI/eMMC clock and
reset entries
Hi Fabrizio,
On Wed, Dec 14, 2022 at 12:01 AM Fabrizio Castro
<fabrizio.castro.jz@...esas.com> wrote:
> From: Phil Edworthy <phil.edworthy@...esas.com>
>
> Add SDHI/eMMC clock/reset entries to CPG driver.
>
> Signed-off-by: Phil Edworthy <phil.edworthy@...esas.com>
> ---
>
> This patch can clash with the below patch (which hasn't been reviewed
> yet):
> https://patchwork.kernel.org/project/linux-renesas-soc/patch/20221212172804.1277751-2-biju.das.jz@bp.renesas.com/
I'll just ignore the overlap...
I couldn't review the clock parents, as that information seems to
be restricted, but the rest LGTM.
Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>
i.e. will queue in renesas-clk-for-v6.3.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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