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Message-Id: <em37536add-7867-4e7d-9294-9a8389a661e2@a9022134.com>
Date: Wed, 21 Dec 2022 15:51:59 +0000
From: "Bin Meng" <bmeng@...ylab.org>
To: linux-kernel <linux-kernel@...r.kernel.org>,
linux-riscv <linux-riscv@...ts.infradead.org>,
linux-serial <linux-serial@...r.kernel.org>
Cc: aou <aou@...s.berkeley.edu>,
"catalin.marinas" <catalin.marinas@....com>,
gregkh <gregkh@...uxfoundation.org>,
jirislaby <jirislaby@...nel.org>, palmer <palmer@...belt.com>,
"paul.walmsley" <paul.walmsley@...ive.com>,
linux <linux@...linux.org.uk>, will <will@...nel.org>,
linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v3 0/3] serial: Add RISC-V support to the earlycon semihost driver
On 2022/12/9 23:04:34, "Bin Meng" <bmeng@...ylab.org> wrote:
>RISC-V semihosting spec [1] is built on top of the existing Arm one;
>we can add RISC-V earlycon semihost driver easily.
>
>This series refactors the existing driver a little bit, to move smh_putc()
>variants in respective arch's semihost.h, then we can implement RISC-V's
>version in the riscv arch directory.
>
>Link: https://github.com/riscv/riscv-semihosting-spec/blob/main/riscv-semihosting-spec.adoc [1]
>
>Changes in v3:
>- add #ifdef in the header to prevent from multiple inclusion
>- add forward-declare struct uart_port
>- add a Link tag in the commit message
>
Ping?
Regards,
Bin
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