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Message-Id: <20221221-kvm-sysreg-cleanup-v1-0-112ddb14fb4e@kernel.org>
Date:   Wed, 21 Dec 2022 18:06:09 +0000
From:   Mark Brown <broonie@...nel.org>
To:     Marc Zyngier <maz@...nel.org>, James Morse <james.morse@....com>,
        Alexandru Elisei <alexandru.elisei@....com>,
        Suzuki K Poulose <suzuki.poulose@....com>,
        Oliver Upton <oliver.upton@...ux.dev>,
        Catalin Marinas <catalin.marinas@....com>,
        Will Deacon <will@...nel.org>
Cc:     linux-arm-kernel@...ts.infradead.org, kvmarm@...ts.linux.dev,
        kvmarm@...ts.cs.columbia.edu, linux-kernel@...r.kernel.org,
        Mark Brown <broonie@...nel.org>
Subject: [PATCH 0/2] KVM: arm64: syreg cleanups/fixes

While looking at the KVM ID register handling I realised that the
ARM64_FEATURE_MASK() macro which is extensively used there assumes that
all ID register fields are 4 bits wide which is sadly no longer true.
Fixing this just in the macro results in something that asked for
further cleanup so I went and did that.  The end result is this series
which replaces code like:

	val &= ~ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_GIC);
	val |= FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_GIC), 1);

with:

	val &= ~ID_AA64PFR0_EL1_GIC_MASK;
	val |= SYS_FIELD_PREP(ID_AA64PFR0_EL1, GIC, 1);

which is if nothing else shorter with less boilerplate, and as a side
effect removes the assumption that all feature fields are 4 bits wide
that was what got me started.

At least one other assumption that fields are 4 bits wide exists in the
pKVM code in get_restricture_features_unsigned().  I have left this for
now since it is a much less mechanical change so probably belongs in a
separate series, I will work on that separately.  The one register I am
aware of with fields that are impacted is ID_AA64SMFR0_EL1 so should
only become relevant in the event that we expose SME to pKVM guests.

There are some similar changes to use SYS_FIELD_ that could be done in
the GIC code but this is already far larger than would be expected for
the original fix and updating the GIC code will need the GIC registers
converting to generation which would really increase the size of the
series.  The GIC also doesn't use ARM64_FEATURE_MASK() which was the
original issue.  I will also send updates for the GIC separately.

Since this is highly likely to generate conflicts I'm posting during the
merge window to try to get a head start on review, I'll rebase against
-rc1 once that appears.

To: Marc Zyngier <maz@...nel.org>
To: James Morse <james.morse@....com>
To: Alexandru Elisei <alexandru.elisei@....com>
To: Suzuki K Poulose <suzuki.poulose@....com>
To: Oliver Upton <oliver.upton@...ux.dev>
To: Catalin Marinas <catalin.marinas@....com>
To: Will Deacon <will@...nel.org>
Cc: linux-arm-kernel@...ts.infradead.org
Cc: kvmarm@...ts.linux.dev
Cc: kvmarm@...ts.cs.columbia.edu
Cc: linux-kernel@...r.kernel.org
Signed-off-by: Mark Brown <broonie@...nel.org>

---
Mark Brown (2):
      KVM: arm64: Convert non-GIC code to SYS_FIELD_{GET,PREP}
      KVM: arm64: Remove use of ARM64_FEATURE_MASK()

 arch/arm64/include/asm/sysreg.h                |   3 -
 arch/arm64/kvm/hyp/include/nvhe/fixed_config.h | 120 ++++++++++++-------------
 arch/arm64/kvm/hyp/nvhe/pkvm.c                 |  40 ++++-----
 arch/arm64/kvm/hyp/nvhe/sys_regs.c             |  26 +++---
 arch/arm64/kvm/pmu-emul.c                      |   2 +-
 arch/arm64/kvm/sys_regs.c                      |  66 +++++++-------
 6 files changed, 128 insertions(+), 129 deletions(-)
---
base-commit: e45fb347b630ee76482fe938ba76cf8eab811290
change-id: 20221221-kvm-sysreg-cleanup-dd618baabebb

Best regards,
-- 
Mark Brown <broonie@...nel.org>

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